Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: Provided are methods of fabricating a semiconductor device that include providing a substrate that includes a first region having a gate pattern and a second region having a first trench and an insulating layer that fills the first trench. A portion of a sidewall of the first trench is exposed by etching part of the insulating layer and a first spacer is formed on a sidewall of the gate pattern. A second spacer is formed on the exposed sidewall of the first trench, wherein the first spacer and the second spacer are formed simultaneously.

Abstract: In a method for fabricating a semiconductor device, a semiconductor device is provided including an interlayer dielectric film and first and second hard mask patterns sequentially stacked thereon. A first trench is provided in the interlayer dielectric film through the second hard mask pattern and the first hard mask pattern. A filler material is provided on the interlayer dielectric film and the first and second hard mask patterns to fill the first trench. First and second hard mask trimming patterns are formed by trimming sidewalls of the first and second hard mask patterns and removing the filler material to expose the first trench. A damascene wire is formed by filling the first trench with a conductive material.

Abstract: A method of fabricating a semiconductor device, the method including forming on a substrate a transistor that includes a gate electrode and a source and drain region, forming an interlayer insulating film on the transistor, forming a contact hole in the interlayer insulating film to expose a top surface of the source and drain region, and a thin film is formed at an interface between the contact hole and the exposed top surface of the source and drain region. The method further including selectively removing at least a portion of the thin film by performing an etching process in a non-plasma atmosphere, forming an ohmic contact film on the source and drain region where at least a portion of the thin film was selectively removed, and forming a contact plug by filling the contact hole with a conductive material.

Abstract: In a method for fabricating a semiconductor device, a substrate is provided including an interlayer dielectric layer and first and second hard mask patterns sequentially stacked thereon. A first trench is provided in the interlayer dielectric layer through the second hard mask pattern and the first hard mask pattern. A filler material is provided on the interlayer dielectric layer and the second hard mask pattern to fill the first trench. An upper portion of the second hard mask pattern is exposed by partially removing the filler material. The second hard mask pattern is removed, and remaining filler material is removed from the first trench. A wiring is formed by filling the first trench with a conductive material.

Abstract: In a method for fabricating a semiconductor device, a semiconductor device is provided including an interlayer dielectric film and first and second hard mask patterns sequentially stacked thereon. A first trench is provided in the interlayer dielectric film through the second hard mask pattern and the first hard mask pattern. A filler material is provided on the interlayer dielectric film and the first and second hard mask patterns to fill the first trench. First and second hard mask trimming patterns are formed by trimming sidewalls of the first and second hard mask patterns and removing the filler material to expose the first trench. A damascene wire is formed by filling the first trench with a conductive material.

Abstract: Provided are a semiconductor device, which can facilitate a salicide process and can prevent a gate from being damaged due to misalign, and a method of manufacturing of the semiconductor device. The method includes forming a first insulation layer pattern on a substrate having a gate pattern and a source/drain region formed at both sides of the gate pattern, the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source/drain region, forming a second insulation layer on the entire surface of the substrate to cover the first insulation layer pattern and the silicide layer, and forming a contact hole in the second insulation layer to expose the silicide layer.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: A method of fabricating a semiconductor device can be provided by etching sidewalls of a preliminary trench in a substrate that are between immediately adjacent gate electrode structures, to recess the sidewalls further beneath the gate electrode structures to provide recessed sidewalls. Then, the recessed sidewalls and a bottom of the preliminary trench can be etched using crystallographic anisotropic etching to form a hexagonally shaped trench in the substrate.

Abstract: A semiconductor integrated circuit device includes a substrate. A gate structure is formed on the substrate and includes a gate insulating film and a gate electrode. A first sidewall spacer is formed on two sidewalls of the gate structure. A second sidewall spacer is formed on the first sidewall spacer. A recess compensation film is interposed between the second sidewall spacer and the substrate. An epitaxial layer is in contact with the recess compensation film.

Abstract: An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening.

Abstract: The present invention provides etchant solutions including deionized water and an organic acid having a carboxyl radical and a hydroxyl radical. Methods of forming magnetic memory devices are also disclosed.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: A method of forming a pattern in a semiconductor device includes forming an etching object layer on a substrate, the etching object layer is an oxide that is substantially free of impurities. A mask is formed on the etching object layer, the mask is an oxide that includes impurities. The etching object layer is patterned using the mask as an etching mask and then the mask is removed. The mask is removed using an etchant having an etching selectivity to an oxide that is substantially free of impurities and an oxide that includes impurities during removing of the mask to limit damage to the patterned etching object layer during removal of the mask.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.

Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.

Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.

Abstract: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.