Abstract: An MOS digital to analog converter on a semiconductor chip includes N digital inputs and a single analog output. The digital inputs control circuitry which switches in various combinations of 2.sup.0 +2.sup.1 +...2.sup.N-1 IGFETs with substantially similar voltage current characteristics coupled between a voltage supply conductor and an analog current output conductor. The IGFETs are arranged in N groups, each group being controlled, respectively, by one of the digital inputs. The number of IGFETs in each group is given by the expression 2.sup.n-1 where 1.ltoreq.n.ltoreq.N. A control circuit including a plurality of substantially identical diode-connected IGFETs is coupled between a constant current source and the voltage supply conductor. The voltage supply conductor provides a voltage which is gated by means of switching circuitry controlled by the digital inputs to the gate electrodes, respectively, of each of the groups of IGFETs.