Patents by Inventor Jerzy Wielgus

Jerzy Wielgus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9627592
    Abstract: An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer (210, 310, 410) disposed between a first electrode (212, 312, 412) and a layer (208, 308, 408) of the plurality of free standing quantum dots. A hole transport layer (206, 306, 406) is disposed between the layer (208, 308, 408) of the plurality of quantum dots and a second electrode (204, 304, 404). A light source (224, 324, 424) is disposed so as to apply light to the layer (208, 308, 408) of the plurality of free standing quantum dots. The photon output of the layer (208, 308, 408) of the plurality of free standing quantum dots is modulated by applying a voltage to the first and second electrodes (212, 312, 412, 204, 304, 404).
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: April 18, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Andrew F. Skipor, Jerzy Wielgus
  • Publication number: 20160072025
    Abstract: An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer (210, 310, 410) disposed between a first electrode (212, 312, 412) and a layer (208, 308, 408) of the plurality of free standing quantum dots. A hole transport layer (206, 306, 406) is disposed between the layer (208, 308, 408) of the plurality of quantum dots and a second electrode (204, 304, 404). A light source (224, 324, 424) is disposed so as to apply light to the layer (208, 308, 408) of the plurality of free standing quantum dots. The photon output of the layer (208, 308, 408) of the plurality of free standing quantum dots is modulated by applying a voltage to the first and second electrodes (212, 312, 412, 204, 304, 404).
    Type: Application
    Filed: September 14, 2015
    Publication date: March 10, 2016
    Inventors: Andrew F. SKIPOR, Jerzy WIELGUS
  • Patent number: 9136498
    Abstract: An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer (210, 310, 410) disposed between a first electrode (212, 312, 412) and a layer (208, 308, 408) of the plurality of free standing quantum dots. A hole transport layer (206, 306, 406) is disposed between the layer (208, 308, 408) of the plurality of quantum dots and a second electrode (204, 304, 404). A light source (224, 324, 424) is disposed so as to apply light to the layer (208, 308, 408) of the plurality of free standing quantum dots. The photon output of the layer (208, 308, 408) of the plurality of free standing quantum dots is modulated by applying a voltage to the first and second electrodes (212, 312, 412, 204, 304, 404).
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: September 15, 2015
    Assignee: QD VISION, INC.
    Inventors: Andrew F. Skipor, Jerzy Wielgus
  • Patent number: 8318032
    Abstract: A method for delineating a metallization pattern in a layer of sputtered aluminum or sputtered copper using a broad spectrum high intensity light source. The metal is deposited on a polymeric substrate by sputtering, so that it has a porous nanostructure. An opaque mask that is a positive representation of the desired metallization pattern is then situated over the metallization layer, exposing those portions of the metallization layer intended to be removed. The masked metallization layer is then exposed to a rapid burst of high intensity visible light from an arc source sufficient to cause complete removal of the exposed portions of the metallization layer, exposing the underlying substrate and creating the delineated pattern.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: November 27, 2012
    Assignee: Motorola Solutions, Inc.
    Inventors: John B. Szczech, Daniel R. Gamota, Tomasz L. Klosowiak, Jerzy Wielgus
  • Patent number: 8134233
    Abstract: A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 13, 2012
    Assignee: Motorola Solutions, Inc.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, Tomasz L. Klosowiak, John B. Szczech, Kin P. Tsui
  • Patent number: 7780345
    Abstract: A method and apparatus for an irreversible temperature sensor for measuring a peak exposure temperature. The apparatus is fabricated by printing an admixture of conductive nanoparticles on a dielectric substrate to form a film. The film has an electrical resistance that is inversely proportional to the exposure temperature. The electrical resistance also irreversibly decreases as the exposure temperature of the film increases. A portion of the film is exposed to a pulse of electromagnetic energy sufficient to render it substantially more electrically conductive than the portion that was not exposed. In use, the peak exposure temperature is determined by measuring the electrical resistance of the non-altered portion of the film and the electrical resistance of the portion that was exposed to the pulse of electromagnetic energy, and subtracting the electrical resistance of the altered portion from the electrical resistance of the portion that was not altered, to provide a difference value.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: August 24, 2010
    Assignee: Motorola, Inc.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Kin P. Tsui, Jie Zhang
  • Patent number: 7667285
    Abstract: A protective photochromic barrier film for a light-sensitive printed electronic substrate. Light-sensitive semiconductor devices on a dielectric substrate are electrically connected by conductors. A barrier layer containing photochromic dyes covers some or all of the light-sensitive semiconductor devices. Upon exposure to visible, infrared, or ultraviolet light, the photochromic dyes change chemical structure and decrease the amount of visible or non-visible light that can impinge upon the light-sensitive electronic devices. Upon removal of the visible or non-visible light, the photochromic dyes either revert to their original structure or maintain their altered state.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: February 23, 2010
    Assignee: Motorola, Inc.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Jie Zhang
  • Publication number: 20090161727
    Abstract: A method and apparatus for an irreversible temperature sensor for measuring a peak exposure temperature. The apparatus is fabricated by printing an admixture of conductive nanoparticles on a dielectric substrate to form a film. The film has an electrical resistance that is inversely proportional to the exposure temperature. The electrical resistance also irreversibly decreases as the exposure temperature of the film increases. A portion of the film is exposed to a pulse of electromagnetic energy sufficient to render it substantially more electrically conductive than the portion that was not exposed. In use, the peak exposure temperature is determined by measuring the electrical resistance of the non-altered portion of the film and the electrical resistance of the portion that was exposed to the pulse of electromagnetic energy, and subtracting the electrical resistance of the altered portion from the electrical resistance of the portion that was not altered, to provide a difference value.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Applicant: MOTOROLA, INC.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Kin P. Tsui, Jie Zhang
  • Publication number: 20090159565
    Abstract: A method for delineating a metallization pattern in a layer of sputtered aluminum or sputtered copper using a broad spectrum high intensity light source. The metal is deposited on a polymeric substrate by sputtering, so that it has a porous nanostructure. An opaque mask that is a positive representation of the desired metallization pattern is then situated over the metallization layer, exposing those portions of the metallization layer intended to be removed. The masked metallization layer is then exposed to a rapid burst of high intensity visible light from an arc source sufficient to cause complete removal of the exposed portions of the metallization layer, exposing the underlying substrate and creating the delineated pattern.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: MOTOROLA, INC.
    Inventors: John B. Szczech, Daniel R. Gamota, Tomasz L. Klosowiak, Jerzy Wielgus
  • Publication number: 20090080233
    Abstract: A printed read only memory (ROM) device that consists of an array of memory resistors, a reference resistor, and analog-to-digital circuit is disclosed. Resistance values are dependent on the data to be stored in the read only memory. During read operation, a resistor in the array is powered, activating a voltage divider between the powered resistor and the reference resistor. The analog-to-digital circuit will read the divided voltage level between the two resistors, compare the voltage supply level and interpret it into bits of memory data. During the manufacturing of the ROM circuit, an array of memory resistors is printed as the means for storage of the data. Resistive inks of specific resistance values are selected and printed in a preferred layout that includes a reference resistor coupled to the determined array of memory resistors and an analog to digital converter so as to form a read only memory with the received data.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 26, 2009
    Applicant: Motorola, Inc.
    Inventors: Kin P. TSUI, Daniel R. GAMOTA, Kristina KALYANASUNDARAM, John B. SZCZECH, Xiangcheng TANG, Jerzy WIELGUS, Jie ZHANG
  • Publication number: 20090001385
    Abstract: An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer (210, 310, 410) disposed between a first electrode (212, 312, 412) and a layer (208, 308, 408) of the plurality of free standing quantum dots. A hole transport layer (206, 306, 406) is disposed between the layer (208, 308, 408) of the plurality of quantum dots and a second electrode (204, 304, 404). A light source (224, 324, 424) is disposed so as to apply light to the layer (208, 308, 408) of the plurality of free standing quantum dots. The photon output of the layer (208, 308, 408) of the plurality of free standing quantum dots is modulated by applying a voltage to the first and second electrodes (212, 312, 412, 204, 304, 404).
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: MOTOROLA, INC.
    Inventors: Andrew F. Skipor, Jerzy Wielgus
  • Publication number: 20080172197
    Abstract: A display (1100) comprises a passive screen (106, 502, 700, 1114) printed with a pattern (404) of different color quantum dots (602, 604, 606) that is excited by scanning a laser (130, 1108) over the screen (106, 502, 700, 1114). The display (1100) can be incorporated into a handheld device (100, 1200) to improve the use-ability of the device (100, 1200).
    Type: Application
    Filed: January 11, 2007
    Publication date: July 17, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Andrew F. Skipor, Marc K. Chason, William F. Hoffman, Krishna D. Jonnalagadda, Mark A. Tarlton, George T. Valliath, Jerzy Wielgus
  • Publication number: 20080142918
    Abstract: A protective photochromic barrier film for a light-sensitive printed electronic substrate. Light-sensitive semiconductor devices on a dielectric substrate are electrically connected by conductors. A barrier layer containing photochromic dyes covers some or all of the light-sensitive semiconductor devices. Upon exposure to visible, infrared, or ultraviolet light, the photochromic dyes change chemical structure and decrease the amount of visible or non-visible light that can impinge upon the light-sensitive electronic devices. Upon removal of the visible or non-visible light, the photochromic dyes either revert to their original structure or maintain their altered state.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Jie Zhang
  • Publication number: 20080124528
    Abstract: A printed electronic device and methods for determining the electrical value of the device. A dielectric material is contact printed on a substrate using a preset force. The substrate has a pressure sensitive material that is optically responsive in direct proportion to the amount of force imparted by the contact printing. The force of the contact printing causes the pressure sensitive material to form a pattern that is quantifiable to the amount of force. The pattern is then optically inspected and compared to sets of standards in order to quantify the amount of force that was used in printing. The thickness of the printed dielectric material is then calculated based on the quantified force by comparing to another set of standards. The electrical value of the printed material is calculated based on the calculated thickness of the printed dielectric material, the surface area of the printed dielectric material, and the dielectric constant of the dielectric material.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 29, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Jie Zhang
  • Patent number: 7244626
    Abstract: Two or more semiconductor devices (21 and 22) are formed on a substrate (20) and are each comprised of a plurality of printed components (23 and 24). At least one such printed component (25) is shared by both such semiconductor devices.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: July 17, 2007
    Assignee: Motorola, Inc.
    Inventors: Hakeem B. Adewole, Paul W. Brazis, Daniel R. Gamota, Jerzy Wielgus, Jie Zhang
  • Publication number: 20070090459
    Abstract: A printed transistor has a first gate (202) printed and disposed on a first side of a printed deposit of semiconductor material (201) and a second printed gate (301) disposed on an opposite side of the printed deposit of semiconductor material. By one approach these elements are provided using a serial printing process. By another approach these elements are provided through use of a lamination process.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Jie Zhang, Hakeem Adewole, Paul Brazis, Timothy Collins, Daniel Gamota, John Szczech, Jerzy Wielgus
  • Publication number: 20060003475
    Abstract: Two or more semiconductor devices (21 and 22) are formed on a substrate (20) and are each comprised of a plurality of printed components (23 and 24). At least one such printed component (25) is shared by both such semiconductor devices.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Hakeem Adewole, Paul Brazis, Daniel Gamota, Jerzy Wielgus, Jie Zhang
  • Patent number: 6870181
    Abstract: An organic field effect transistor utilizes a bifunctional contact-enhancing agent at various interfaces to improve carrier mobility through the organic semiconductor layer, to improve carrier injection, and to enhance adhesion via a bifunctional mechanism. The contact-enhancing agent can be situated between the gate electrode (2) and the dielectric layer (3) to form a chemical or physical bond between the gate electrode and the dielectric layer. It can also be situated between the dielectric layer and the organic semiconducting layer (4), or between the source and drain electrodes (5, 6) and the organic semiconducting layer.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: March 22, 2005
    Assignee: Motorola, Inc.
    Inventors: Jie Zhang, Paul Brazis, Daniel Gamota, Krishna Kalyanasundaram, Steven Scheifers, Jerzy Wielgus, Abhijit Roy Chowdhuri
  • Publication number: 20040004213
    Abstract: An organic field effect transistor utilizes a bifunctional contact-enhancing agent at various interfaces to improve carrier mobility through the organic semiconductor layer, to improve carrier injection, and to enhance adhesion via a bifunctional mechanism. The contact-enhancing agent can be situated between the gate electrode (2) and the dielectric layer (3) to form a chemical or physical bond between the gate electrode and the dielectric layer. It can also be situated between the dielectric layer and the organic semiconducting layer (4), or between the source and drain electrodes (5, 6) and the organic semiconducting layer.
    Type: Application
    Filed: July 2, 2002
    Publication date: January 8, 2004
    Inventors: Jie Zhang, Paul Brazis, Daniel Gamota, Krishna Kalyanasundaram, Steven Scheifers, Jerzy Wielgus, Abhijit Roy Chowdhuri
  • Patent number: 6661024
    Abstract: An integrated circuit (100, 200, 300, 400) that includes a field effect transistor (102, 202, 302, 402) is fabricated by forming an organic semiconductor channel (112, 216, 308, 418) on one substrate (106, 204), forming device electrodes (114, 116, 110, 208, 210, 212) on one or more other substrates (104, 108, 206), and subsequently laminating the substrates together. In one embodiment, a dielectric patch (214) that functions as a gate dielectric is formed on one of the substrates (204, 206) prior to performing the lamination. Lamination provides a low cost route to device assembly, allows for separate fabrication of different device structures on different substrates, and thins various device layers resulting in improved performance.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: December 9, 2003
    Assignee: Motorola, Inc.
    Inventors: Jie Zhang, Paul Brazis, Daniel Gamota, Krishna Kalyanasundaram, Steven Scheifers, Jerzy Wielgus, Abhijit Roy Chowdhuri