Patents by Inventor Jian-Wei Chen

Jian-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119213
    Abstract: A method includes designing a plurality of cells for a semiconductor device, wherein designing the plurality of cells comprises reserving a routing track of a plurality of routing tracks within each of the plurality of cells, wherein each of the plurality of cells comprises signal lines, and the reserved routing track is free of the signal lines. The method includes placing a first cell and a second cell of the plurality of cells in a layout of the semiconductor device. The method includes determining whether any power rails overlap with any of the plurality of routing tracks other than the reserved routing track in the second cell. The method includes adjusting a distance between the first cell and the second cell in response to a determination that at least one power rail overlaps with at least one routing track other than the reserved routing track.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jian-Sing LI, Jung-Chan YANG, Ting Yu CHEN, Ting-Wei CHIANG
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Publication number: 20240105818
    Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Jian-Jou Lian, Chun-Neng Lin, Ming-Hsi Yeh, Chieh-Wei Chen, Tzu-Ang Chiang
  • Patent number: 11942563
    Abstract: A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: March 26, 2024
    Assignee: XINTEC INC.
    Inventors: Chia-Sheng Lin, Hui-Hsien Wu, Jian-Hong Chen, Tsang-Yu Liu, Kuei-Wei Chen
  • Publication number: 20240071849
    Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Jian-You Chen, Kuan-Yu Huang, Li-Chung Kuo, Chen-Hsuan Tsai, Kung-Chen Yeh, Hsien-Ju Tsou, Ying-Ching Shih, Szu-Wei Lu
  • Patent number: 11687065
    Abstract: A method for generating and updating position distribution graph comprises: generating a position distribution graph according to a circuit bitmap and an exposure pattern, performing an exposure simulation according to the position distribution graph to generate an exposure result graph, comparing the circuit bitmap with the exposure result graph to generate a plurality of error distribution candidate graphs, selecting one of the error distribution candidate graphs to serve as an error distribution graph, and performing a zero-one integer programming to update the position distribution graph according to the circuit bitmap and the error distribution graph, wherein the updated position distribution graph is associated with the error distribution graph.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: June 27, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shau-Yin Tseng, Jian-Wei Chen
  • Publication number: 20220197263
    Abstract: A method for generating and updating position distribution graph comprises: generating a position distribution graph according to a circuit bitmap and an exposure pattern, performing an exposure simulation according to the position distribution graph to generate an exposure result graph, comparing the circuit bitmap with the exposure result graph to generate a plurality of error distribution candidate graphs, selecting one of the error distribution candidate graphs to serve as an error distribution graph, and performing a zero-one integer programming to update the position distribution graph according to the circuit bitmap and the error distribution graph, wherein the updated position distribution graph is associated with the error distribution graph.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shau-Yin TSENG, Jian-Wei CHEN
  • Patent number: 10043882
    Abstract: A method of forming a semiconductor device includes the following steps. A substrate is provided, and the substrate has a first region. A barrier layer is then formed on the first region of the substrate. A first work function layer is formed on the barrier layer. An upper half portion of the first work function layer is converted into a non-volatile material layer. The non-volatile material layer is removed and a lower half portion of the first work function layer is kept.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: August 7, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Publication number: 20180151685
    Abstract: A method of forming a semiconductor device includes the following steps. A substrate is provided, and the substrate has a first region. A barrier layer is then formed on the first region of the substrate. A first work function layer is formed on the barrier layer. An upper half portion of the first work function layer is converted into a non-volatile material layer. The non-volatile material layer is removed and a lower half portion of the first work function layer is kept.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 31, 2018
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Patent number: 9899491
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first gate structure and a second gate structure disposed on the substrate. The first gate structure includes a barrier layer, a first work function layer, a second work function layer and a conductive layer stacked one over another on the substrate. The second gate structure includes the barrier layer, a portion of the first work function layer and the conductive layer stacked one over another on the substrate, wherein the portion of the first work function layer has a smaller thickness than a thickness of the first work function layer.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 20, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Publication number: 20170330952
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first gate structure and a second gate structure disposed on the substrate. The first gate structure includes a barrier layer, a first work function layer, a second work function layer and a conductive layer stacked one over another on the substrate. The second gate structure includes the barrier layer, a portion of the first work function layer and the conductive layer stacked one over another on the substrate, wherein the portion of the first work function layer has a smaller thickness than a thickness of the first work function layer.
    Type: Application
    Filed: June 15, 2016
    Publication date: November 16, 2017
    Inventors: Po-Wen Su, Zhen Wu, Hsiao-Pang Chou, Chiu-Hsien Yeh, Shui-Yen Lu, Jian-Wei Chen
  • Patent number: 9443952
    Abstract: A method of forming a semiconductor device is disclosed. A substrate having multiple fins is provided. An insulating layer fills a lower portion of a gap between two adjacent fins. At least one first stacked structure is formed on one fin and at least one second stacked structure is formed on one insulation layer. A first dielectric layer is formed to cover the first and second stacked structures. A portion of the first dielectric layer and portions of the first and second stacked structures are removed. Another portion of the first dielectric layer is removed until a top of the remaining first dielectric layer is lower than tops of the first and second stacked structures. A second dielectric layer is formed to cover the first and second stacked structures. A portion of the second dielectric layer is removed until the tops of the first and second stacked structures are exposed.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: September 13, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Tsen Lu, Chih-Jung Su, Jian-Wei Chen, Shui-Yen Lu, Yi-Wen Chen, Po-Cheng Huang, Chen-Ming Huang, Shih-Fang Tzou
  • Publication number: 20160170552
    Abstract: A processing method for touch signals includes receiving at least one touch signal packet, wherein the at least one touch signal packet is generated in response to operations of at least one object on a touch device, performing a determination process according to at least one of the at least one touch signal packet and an application program being executed in a computer system, and providing at least one first packet to a first driver or providing at least one second packet to a second driver according to a determination result of the determination process, wherein when receiving the at least one first packet, the first driver generates a first command according to the at least one first packet, and when receiving the at least one second packet, the second driver generates a second command according to the at least one second packet.
    Type: Application
    Filed: September 16, 2015
    Publication date: June 16, 2016
    Inventors: Jian-Wei Chen, Ying-Chieh Chuang, Jiun-Hua Chiu
  • Publication number: 20160099179
    Abstract: A method of forming a semiconductor device is disclosed. A substrate having multiple fins is provided. An insulating layer fills a lower portion of a gap between two adjacent fins. At least one first stacked structure is formed on one fin and at least one second stacked structure is formed on one insulation layer. A first dielectric layer is formed to cover the first and second stacked structures. A portion of the first dielectric layer and portions of the first and second stacked structures are removed. Another portion of the first dielectric layer is removed until a top of the remaining first dielectric layer is lower than tops of the first and second stacked structures. A second dielectric layer is formed to cover the first and second stacked structures. A portion of the second dielectric layer is removed until the tops of the first and second stacked structures are exposed.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Chun-Tsen Lu, Chih-Jung Su, Jian-Wei Chen, Shui-Yen Lu, Yi-Wen Chen, Po-Cheng Huang, Chen-Ming Huang, Shih-Fang Tzou
  • Patent number: 9024895
    Abstract: The present invention provides a touch pad operable with multi-objects and a method of operating such a touch pad. The touch pad includes a touch structure for sensing touch points of a first and a second object and a controller for generating corresponding touching signals and related position coordinates. Moreover, the controller calculates at least two movement amount indexes according to coordinate differences between these position coordinates, thereby generating a movement amount control signal to control behaviors of a software object.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: May 5, 2015
    Assignee: Elan Microelectronics Corporation
    Inventors: Wei-Wen Yang, Chuh-Min Liu, Jian-Wei Chen
  • Patent number: 8828843
    Abstract: A method of manufacturing an isolation structure includes forming a laminate structure on a substrate. A plurality trenches is formed in the laminate structure. Subsequently a pre-processing is effected to form a hydrophilic thin film having oxygen ions on the inner wall of the trenches. Spin-on-dielectric (SOD) materials are filled into the trenches. The hydrophilic think film having oxygen ions changes the surface tension of the inner wall of the trenches and increases SOD material fluidity.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: September 9, 2014
    Assignee: Inotera Memories, Inc.
    Inventors: Yaw-Wen Hu, Jung-Chang Hsieh, Kuen-Shin Huang, Jian-Wei Chen, Ming-Tai Chien
  • Publication number: 20140220762
    Abstract: A method of manufacturing an isolation structure includes forming a laminate structure on a substrate. A plurality trenches is formed in the laminate structure. Subsequently a pre-processing is effected to form a hydrophilic thin film having oxygen ions on the inner wall of the trenches. Spin-on-dielectric (SOD) materials are filled into the trenches. The hydrophilic think film having oxygen ions changes the surface tension of the inner wall of the trenches and increases SOD material fluidity.
    Type: Application
    Filed: May 2, 2013
    Publication date: August 7, 2014
    Applicant: INOTERA MEMORIES, INC.
    Inventors: YAW-WEN HU, JUNG-CHANG HSIEH, KUEN-SHIN HUANG, JIAN-WEI CHEN, MING-TAI CHIEN
  • Publication number: 20140184528
    Abstract: The method for identifying a gesture on a touch panel has steps of receiving position information of at least three touch objects; determining whether the position information of any one of the at least three touch objects has been changed; if the position information of any one of the at least three touch objects has been changed, calculating a first sum of distances between the at least three touch objects before moving, then calculating a second sum of distances between the at least three touch objects after moving, and calculating a variation between the first sum and the second sum; and determining whether the variation exceeds a default value, and if the variation exceeds a default value, a first gesture is identified. The first gesture is identified as a grab gesture or a spread gesture based on whether the variation is positive or negative.
    Type: Application
    Filed: April 3, 2013
    Publication date: July 3, 2014
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Jian-Wei CHEN, Chien-Chou CHEN, Ying-Chieh CHUANG
  • Publication number: 20130106745
    Abstract: The present invention provides a touch pad operable with multi-objects and a method of operating such a touch pad. The touch pad includes a touch structure for sensing touch points of a first and a second object and a controller for generating corresponding touching signals and related position coordinates. Moreover, the controller calculates at least two movement amount indexes according to coordinate differences between these position coordinates, thereby generating a movement amount control signal to control behaviors of a software object.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 2, 2013
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Wei-Wen YANG, Chuh-Min LIU, Jian-Wei Chen