Patents by Inventor Jianbao Wang

Jianbao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9577508
    Abstract: Power-supply ripple rejection (PSRR) at high frequencies is improved for an LDO voltage regulator with an NMOS pass transistor (MN1). A ripple voltage (Vripple) present on the input voltage causes a ripple current (Iripple) through parasitic gate-drain capacitance of the pass transistor. A small ripple current (Ifraction) proportional to the ripple current (Iripple) is generated and amplified to generate a cancellation current (Icancel). The cancellation current is drawn from the gate of NMOS pass transistor (MN1) to cancel the ripple current so that no net ripple current flows through the finite output impedance of an error amplifier (2), to thereby achieve the PSRR improvement.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: February 21, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Jianbao Wang
  • Publication number: 20140340058
    Abstract: Power-supply ripple rejection (PSRR) at high frequencies is improved for an LDO voltage regulator with an NMOS pass transistor (MN1). A ripple voltage (Vripple) present on the input voltage causes a ripple current (Iripple) through parasitic gate-drain capacitance of the pass transistor. A small ripple current (Ifraction) proportional to the ripple current (Iripple) is generated and amplified to generate a cancellation current (Icancel). The cancellation current is drawn from the gate of NMOS pass transistor (MN1) to cancel the ripple current so that no net ripple current flows through the finite output impedance of an error amplifier (2), to thereby achieve the PSRR improvement.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Jianbao Wang
  • Patent number: 8115463
    Abstract: A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: February 14, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Jianbao Wang
  • Publication number: 20100052635
    Abstract: A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 4, 2010
    Inventor: Jianbao Wang
  • Patent number: 7446515
    Abstract: An LDO (low dropout) regulator including a pass transistor having a first electrode coupled to produce an output voltage of the LDO regulator, a control electrode, and a second electrode coupled to receive an input voltage of the LDO regulator. An error amplifier has a first input coupled to a first reference voltage and an output coupled to the gate control electrode of the pass transistor. A first feedback circuit has an input coupled to the first electrode of the pass transistor and an output producing a first feedback voltage coupled to a second input of the error amplifier. The auxiliary amplifier has a first input coupled to a second reference voltage and an output coupled to the output of the error amplifier. A second feedback circuit has an input coupled to the output of the auxiliary amplifier and an output producing a second feedback voltage coupled to a second input of the auxiliary amplifier.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: November 4, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Jianbao Wang
  • Publication number: 20080169795
    Abstract: An LDO (low dropout) regulator including a pass transistor having a first electrode coupled to produce an output voltage of the LDO regulator, a control electrode, and a second electrode coupled to receive an input voltage of the LDO regulator. An error amplifier has a first input coupled to a first reference voltage and an output coupled to the gate control electrode of the pass transistor. A first feedback circuit has an input coupled to the first electrode of the pass transistor and an output producing a first feedback voltage coupled to a second input of the error amplifier. The auxiliary amplifier has a first input coupled to a second reference voltage and an output coupled to the output of the error amplifier. A second feedback circuit has an input coupled to the output of the auxiliary amplifier and an output producing a second feedback voltage coupled to a second input of the auxiliary amplifier.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 17, 2008
    Inventor: Jianbao Wang