Patents by Inventor Jianmin Fang

Jianmin Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100148360
    Abstract: A semiconductor device is made by forming a first conductive layer over a carrier. The first conductive layer has a first area electrically isolated from a second area of the first conductive layer. A conductive pillar is formed over the first area of the first conductive layer. A semiconductor die or component is mounted to the second area of the first conductive layer. A first encapsulant is deposited over the semiconductor die and around the conductive pillar. A first interconnect structure is formed over the first encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The carrier is removed. A portion of the first conductive layer is removed. The remaining portion of the first conductive layer includes an interconnect line and UBM pad. A second interconnect structure is formed over a remaining portion of the first conductive layer is removed.
    Type: Application
    Filed: October 2, 2009
    Publication date: June 17, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Xusheng Bao, Kang Chen, Jianmin Fang
  • Publication number: 20100151523
    Abstract: Single AAV vector constructs for regulated expression of an immunoglobulin molecule or fragment thereof and methods of making and using the same are described. The AAV vectors comprise a regulated promoter operably linked to the coding sequence for a first and second immunoglobulin coding sequence, a sequence encoding a self-processing cleavage site between the coding sequence for the first and second immunoglobulin coding sequence and a additional proteolytic cleavage site, which provides a means to remove the self processing peptide sequence from an expressed immunoglobulin molecule or fragment thereof. The vector constructs find utility in enhanced production of biologically active immunoglobulins or fragments thereof in vitro and in vivo.
    Type: Application
    Filed: June 30, 2009
    Publication date: June 17, 2010
    Applicants: CELL GENESYS, INC., ARIAD PHARMACEUTICALS, INC.
    Inventors: JIANMIN FANG, KARIN JOOSS, MINH NGUYEN, THOMAS C. HARDING, TIMOTHY P. CLACKSON, VICTOR M. RIVERA
  • Publication number: 20100140736
    Abstract: A semiconductor device has a first insulation layer formed over a sacrificial substrate. A first conductive layer is formed over the first insulating layer. Conductive pillars are formed over the first conductive layer. A pre-fabricated IPD is disposed between the conductive pillars. An encapsulant is formed around the IPD and conductive pillars. A second insulation layer is formed over the encapsulant. The conductive pillars are electrically connected to the first and second conductive layers. The first and second conductive layers each include an inductor. Semiconductor devices are mounted over the first and second insulating layer and electrically connected to the first and second conductive layers, respectively. An interconnect structure is formed over the first and second insulating layers, respectively, and electrically connected to the first and second conductive layers. The sacrificial substrate is removed.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100140779
    Abstract: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) structure is formed over the temporary carrier. The IPD structure includes an inductor, resistor, and capacitor. Conductive posts are mounted to the IPD structure, and first semiconductor die is mounted to the IPD structure. A wafer molding compound is deposited over the conductive posts and the first semiconductor die. A core structure is mounted to the conductive posts over the first semiconductor die. The core structure includes a semiconductor material. Conductive through silicon vias (TSVs) are formed in the core structure. A redistribution layer (RDL) is formed over the core structure. A second semiconductor die is mounted over the semiconductor device. The second semiconductor die is electrically connected to the core structure.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100140751
    Abstract: A semiconductor device is made from a semiconductor wafer containing semiconductor die separated by a peripheral region. A conductive via-in-via structure is formed in the peripheral region or through an active region of the device to provide additional tensile strength. The conductive via-in-via structure includes an inner conductive via and outer conductive via separated by insulating material. A middle conductive via can be formed between the inner and outer conductive vias. The inner conductive via has a first cross-sectional area adjacent to a first surface of the semiconductor device and a second cross-sectional area adjacent to a second surface of the semiconductor device. The outer conductive via has a first cross-sectional area adjacent to the first surface of the semiconductor device and a second cross-sectional area adjacent to the second surface of the semiconductor device. The first cross-sectional area is different from the second cross-sectional area.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Lionel Chien Hui Tay, Jianmin Fang, Zigmund R. Camacho
  • Publication number: 20100140737
    Abstract: A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.
    Type: Application
    Filed: February 11, 2010
    Publication date: June 10, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Haijing Cao, Qing Zhang, Kang Chen, Jianmin Fang
  • Publication number: 20100140772
    Abstract: A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100136008
    Abstract: The subject invention relates generally to novel biologically active TACI-Fc fusion proteins that bind to BLyS and/or APRIL and uses thereof. The invention also relates to methods for recombinant production of homogeneous TACI-Fc fusion proteins on a large scale.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 3, 2010
    Inventors: Jianmin Fang, Zheng Liu
  • Patent number: 7714119
    Abstract: Single AAV vector constructs for expression of an immunoglobulin molecule or fragment thereof and methods of making and using the same are described. The AAV vectors comprise a self-processing cleavage sequence between a first and second immunoglobulin coding sequence allowing for expression of a functional antibody molecule using a single promoter. The vector constructs may further include an additional proteolytic cleavage sequence which provides a means to remove the self processing peptide sequence from an expressed immunoglobulin molecule or fragment thereof. The vector constructs find utility in enhanced production of biologically active immunoglobulins or fragments thereof in vitro and in vivo.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: May 11, 2010
    Assignee: Biosante Pharmaceuticals, Inc.
    Inventors: Jianmin Fang, Karin Jooss, Jing Jing Qian
  • Patent number: 7709224
    Abstract: Vector constructs for expression of two or more functional proteins or polypeptides under operative control of a single promoter and methods of making and using the same are described. The vectors comprise a self-processing cleavage site between each respective protein or polypeptide coding sequence. The vector constructs include the coding sequence for a self-processing cleavage site and may further include an additional proteolytic cleavage sequence which provides a means to remove the self processing peptide sequence from expressed protein(s) or polypeptide(s). The vector constructs find utility in methods for enhanced production of biologically active proteins and polypeptides in vitro and in vivo.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: May 4, 2010
    Assignee: Biosante Pharmaceuticals, Inc.
    Inventors: Jianmin Fang, Karin Jooss, Andrew Simmons, Jing-Jing Qian
  • Patent number: 7691747
    Abstract: A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 6, 2010
    Assignee: STATS ChipPAC, Ltd
    Inventors: Yaojian Lin, Haijing Cao, Qing Zhang Zhang, Kang Chen, Jianmin Fang
  • Publication number: 20100065942
    Abstract: A semiconductor device is made by providing an integrated passive device (IPD). Through-silicon vias (TSVs) are formed in the IPD. A capacitor is formed over a surface of the IPD by depositing a first metal layer over the IPD, depositing a resistive layer over the first metal layer, depositing a dielectric layer over the first metal layer, and depositing a second metal layer over the resistive and dielectric layers. The first metal layer and the resistive layer are electrically connected to form a resistor and the first metal layer forms a first inductor. A wafer supporter is mounted over the IPD using an adhesive material and a third metal layer is deposited over the IPD. The third metal layer forms a second inductor that is electrically connected to the capacitor and the resistor by the TSVs of the IPD. An interconnect structure is connected to the IPD.
    Type: Application
    Filed: September 17, 2008
    Publication date: March 18, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100059853
    Abstract: A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100059855
    Abstract: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted to the temporary carrier using the adhesive. The discrete component includes a capacitor. The IPD and the discrete component are encapsulated using a molding compound. A first metal layer is formed over the molding compound. The first metal layer is connected to the TSVs of the IPD and forms an inductor. The temporary carrier and the adhesive are removed, and a second metal layer is formed over the IPD and the discrete component. The second metal layer interconnects the IPD and the discrete component and forms an inductor. An optional interconnect structure is formed over the second metal layer.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 11, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20100059854
    Abstract: A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Patent number: 7662623
    Abstract: Vector constructs for expression of two or more functional proteins or polypeptides under operative control of a single promoter and methods of making and using the same are described. The vectors comprise a self-processing cleavage site between each respective protein or polypeptide coding sequence. The vector constructs include the coding sequence for a self-processing cleavage site and may further include an additional proteolytic cleavage sequence which provides a means to remove the self processing peptide sequence from expressed protein(s) or polypeptide(s). The vector constructs find utility in methods for enhanced production of biologically active proteins and polypeptides in vitro and in vivo.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: February 16, 2010
    Assignee: BioSante Pharmaceuticals, Inc.
    Inventors: Jianmin Fang, Karin Jooss, Andrew Simmons, Jing-Jing Qian
  • Patent number: 7642128
    Abstract: A semiconductor device is made by forming a first conductive layer over a carrier. The first conductive layer has a first area electrically isolated from a second area of the first conductive layer. A conductive pillar is formed over the first area of the first conductive layer. A semiconductor die or component is mounted to the second area of the first conductive layer. A first encapsulant is deposited over the semiconductor die and around the conductive pillar. A first interconnect structure is formed over the first encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The carrier is removed. A portion of the first conductive layer is removed. The remaining portion of the first conductive layer includes an interconnect line and UBM pad. A second interconnect structure is formed over a remaining portion of the first conductive layer is removed.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: January 5, 2010
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Xusheng Bao, Kang Chen, Jianmin Fang
  • Patent number: 7632509
    Abstract: Lentivector constructs for expression of recombinant proteins, polypeptides or fragments thereof and methods of making the same are described. The lentivectors typically have a self-processing cleavage sequence between a first and second protein or polypeptide coding sequence allowing for expression of a functional protein or polypeptide under operative control of a single promoter and may further include an additional proteolytic cleavage sequence which provides a means to remove the self-processing cleavage sequence from the expressed protein or polypeptide. The vector constructs find utility in methods relating to enhanced production of biologically active proteins, such as immunoglobulins or fragments thereof in vitro and in vivo.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: December 15, 2009
    Assignee: BioSante Pharmaceuticals, Inc.
    Inventors: Jianmin Fang, Karin Jooss, Andrew Simmons, Debbie Farson, Jing Jing Qian
  • Publication number: 20090270485
    Abstract: Cell specific replication-competent viral vectors comprising a self processing peptide cleavage sequence are provided. The targeted replication-competent viral vectors include two or more co-transcribed genes under transcriptional control of the same heterologous transcriptional regulatory element (TRE), wherein at least a second gene is under translational control of a self processing cleavage sequence or 2A sequence. Exemplary vector constructs may further include an additional proteolytic cleavage site which provides a means to remove the self processing peptide sequence from the viral vector.
    Type: Application
    Filed: July 24, 2008
    Publication date: October 29, 2009
    Applicant: CELL GENESYS, INC.
    Inventors: Derek Ko, Yuanhao Li, Thomas Harding, Jianmin Fang, Nagarajan Ramesh, De-Chao Yu
  • Publication number: 20090230542
    Abstract: A semiconductor device is made by providing a sacrificial substrate, forming a first insulating layer over the sacrificial substrate, forming a first passivation layer over the first insulating layer, forming a second insulating layer over the first passivation layer, forming an integrated passive device over the second insulating layer, forming a wafer support structure over the integrated passive device, removing the sacrificial substrate to expose the first insulating layer after forming the wafer support structure, and forming an interconnect structure over the first insulating layer in electrical contact with the integrated passive device. The integrated passive device includes an inductor, capacitor, or resistor. The sacrificial substrate is removed by mechanical grinding and wet etching. The wafer support structure can be glass, ceramic, silicon, or molding compound.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 17, 2009
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Kang Chen, Haijing Cao, Qing Zhang, Jianmin Fang