Abstract: A naked-eye three-dimensional (3D) display device (600) is provided. The naked-eye 3D display device (600) comprises: a display component (610), comprising an array of display units (110); and a viewing angle regulator (620), comprising an array of microprism blocks (120, 620-1, 620-2, 620-3, 620-4, 620-5, 620-6). The microprism blocks (120, 620-1, 620-2, 620-3, 620-4, 620-5, 620-6) are divided into a plurality of groups, and an angle combination of a first angle (?1) and a second angle (?2) of each of the microprism blocks (120, 620-1, 620-2, 620-3, 620-4, 620-5, 620-6) is preset so that outgoing lights of the same group of microprism blocks converge into the same viewpoint, and outgoing lights of different groups of microprism blocks converge into different viewpoints. Hence, a plurality of different viewpoints are formed by setting angles of inclined surfaces of the microprism blocks (120, 620-1, 620-2, 620-3, 620-4, 620-5, 620-6), thereby seeing different 3D display effects from different viewing angles.

Abstract: Provided are a lipid and a composition used for delivery. Specifically provided is a compound represented by formula I or a salt thereof, wherein R1 to R3, H1 to H3, L1, and L2 are as defined in the description.

Abstract: The disclosure relates to mineral processing, and more particularly to a copper(II)-ammonia complex ion sulfidization activator, and its preparation and application. A molar ratio of NH3 to Cu2+ in the active ingredient of the copper(II)-ammonia complex ion sulfidization activator is 2:1-4:1. The preparation method includes: dropwise adding an ammonia solution to a copper salt solution; and adjusting the mixture to pH 6-7.2 with dilute sulfuric acid to obtain the copper(II)-ammonia complex ion sulfidization activator. During the sulfidization flotation for the copper oxide ore, the copper(II)-ammonia complex ion sulfidization activator is added and mixed uniformly with the ore slurry prior to the introduction of the sulfidizing agent.

Abstract: The present invention provides a therapeutic agent for the treatment, prevention and diagnosis of cancers associated with cells that overexpressing podocalyxin-like protein precursor isoform 2 (PODXL-v2) and its variants with deletion of N-terminal serine and proline residues, on the cell surface, including gastric cancers, squamous cell carcinoma of the stomach, gastric adenocarcinoma, small cell carcinoma of the stomach, gastric squamous cell carcinoma, gastric carcinoid tumors, stomach and duodenal cancers, gliobastoma, prostate cancer, urothelial bladder cancer, pancreatic cancer, esophageal cancer, colorectal cancer, ovarian cancer, liver cancer. The agent is based on the amino acid sequences of the novel light chain variable regions of an anti-PODXL-v2 monoclonal antibody (mAb), MAb1738, that can functionally inhibit the proliferation of several human cancer cell lines and the growth and metastasis of gastric cancer in mouse models.

Abstract: The present invention provides a therapeutic agent for the treatment, prevention and diagnosis of cancers associated with cells that overexpressing podocalyxin-like protein precursor isoform 2 (PODXL-v2) and its variants with deletion of N-terminal serine and proline residues, on the cell surface, including gastric cancers, squamous cell carcinoma of the stomach, gastric adenocarcinoma, small cell carcinoma of the stomach, gastric squamous cell carcinoma, gastric carcinoid tumors, stomach and duodenal cancers, gliobastoma, prostate cancer, urothelial bladder cancer, pancreatic cancer, esophageal cancer, colorectal cancer, ovarian cancer, liver cancer. The agent is based on the amino acid sequences of the novel light chain variable regions of an anti-PODXL-v2 monoclonal antibody (mAb), MAI1738, that can functionally inhibit the proliferation of several human cancer cell lines and the growth and metastasis of gastric cancer in mouse models.

Abstract: The disclosure relates to mineral processing, and more particularly to a copper(II)-ammonia complex ion sulfidization activator, and its preparation and application. A molar ratio of NH3 to Cu2+ in the active ingredient of the copper(II)-ammonia complex ion sulfidization activator is 2:1-4:1. The preparation method includes: dropwise adding an ammonia solution to a copper salt solution; and adjusting the mixture to pH 6-7.2 with dilute sulfuric acid to obtain the copper(II)-ammonia complex ion sulfidization activator. During the sulfidization flotation for the copper oxide ore, the copper(II)-ammonia complex ion sulfidization activator is added and mixed uniformly with the ore slurry prior to the introduction of the sulfidizing agent.

Abstract: The present disclosure relates to the technical filed of fingerprint identification, and in particular, relates to a fingerprint identification apparatus and a method for manufacturing the same. The fingerprint identification apparatus includes: a circuit board, a fingerprint sensor, an appearance effect layer, and a covering layer; wherein the fingerprint sensor is arranged on the circuit board, the covering layer is coated over the fingerprint sensor, the appearance effect layer is arranged between the fingerprint sensor and the covering layer, and the appearance effect layer comprises a texture layer and a color layer. In the fingerprint identification apparatus and the method for manufacturing a fingerprint identification apparatus according to the above embodiments of the present disclosure, a texture layer is coated over on the fingerprint sensor or under the cover, and an appearance effect layer is formed by the texture layer and the color layer.

Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.

Abstract: Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.

Abstract: Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.

Abstract: A digital-to-analog converter (DAC) may have an encoder that generates a multi-bit output based on a multi-bit input, a plurality of first converter elements, with each first converter element generating an output according to a single bit of the multi-bit output of the encoder; and a combiner that generates a combined output based on combining outputs from the plurality of first converter elements. The number of bits in the multi-bit input being two or more and the number of bits in the multi-bit output being greater than the number of bits in the multi-bit input. The DAC may also have one or more second converter elements, with second converter element generating an output according to a single bit, and the combiner may generates the combined output based on combining outputs from the plurality of first converter elements with outputs from the one or more second converter elements.

Abstract: A semiconductor chip module and a method for enhancing visual effects of a pattern layer, which relate to the field of semiconductor technology. The semiconductor chip module includes: a flexible printed circuit (1, 10), a sensor layer (2, 20), a color layer (3, 30), a pattern layer (4, 40), and a covering layer (5, 50); where the sensor layer (2, 20) is disposed above the flexible printed circuit (1, 10), and the sensor layer (2, 20) includes at least one sensor; the color layer (3, 30) is disposed above the sensor layer (2, 20); the covering layer (5, 50) is disposed above the color layer (3, 30); the pattern layer (4, 40) is covered by the covering layer (5, 50) or the color layer (3, 30). The pattern layer of the semiconductor chip module in the embodiments of the present application is colored firmly and has various display effects.

Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.

Abstract: A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.

Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.

Abstract: Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

Abstract: The present disclosure relates to the technical filed of fingerprint identification, and in particular, relates to a fingerprint identification apparatus and a method for manufacturing the same. The fingerprint identification apparatus includes: a circuit board, a fingerprint sensor, an appearance effect layer, and a covering layer; wherein the fingerprint sensor is arranged on the circuit board, the covering layer is coated over the fingerprint sensor, the appearance effect layer is arranged between the fingerprint sensor and the covering layer, and the appearance effect layer comprises a texture layer and a color layer. In the fingerprint identification apparatus and the method for manufacturing a fingerprint identification apparatus according to the above embodiments of the present disclosure, a texture layer is coated over on the fingerprint sensor or under the cover, and an appearance effect layer is formed by the texture layer and the color layer.

Abstract: Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

Abstract: Systems and methods are provided for adaptive configuration and control of digital-to-analog converters (DACs). Performance of a plurality of conversion elements in a digital-to-analog converter (DAC) may be assessed based on particular input conditions associated with a digital input to the DAC, and the DAC may be configured based on the assessing of performance. Each conversion element of the plurality of conversion elements handles a particular bit in the digital input. The configuring may comprise selecting a subset of the plurality of conversion elements, and setting only the subset of the plurality of conversion elements to apply a particular type of operations. The particular type of operations pertains to applying digital-to-analog conversions via the DAC, and the particular type of operations relates to or affects performance. The particular input conditions may comprise signal backoff.