Patents by Inventor Jie Liu

Jie Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11899971
    Abstract: The embodiments provide a method for reading and writing and a memory device. The method includes: applying a read command to the memory device, the read command pointing to address information; reading data to be read out from a memory cell corresponding to the address information pointed to by the read command; and storing the address information pointed to by the read command into a memory bit of a preset memory space if an error occurs in the data to be read out, wherein the preset memory space is provided with a plurality of the memory bits, and each of the plurality of memory bits is associated with a spare memory cell.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: February 13, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shuliang Ning, Jun He, Zhan Ying, Jie Liu
  • Publication number: 20240045535
    Abstract: A force sensing processing method of a touchpad is provided. The comparison values obtained by subtracting the force induction quantities of different frames are used to determine whether the achievement conditions are met. If it is met, a processing step is executed to respond the event to be triggered by the changing trend of the user's force. When the force changes rapidly and the force sensing amount cannot be quickly returned to the originally set trigger threshold value, the force changing trend detected by the comparison values are be used to provide the processing steps in real time, so as to improve the user experience.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 8, 2024
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Shih-Hao LIN, Ying-Jie LIU, Hsueh-Wei YANG
  • Patent number: 11892673
    Abstract: A dimming assembly includes a first prism having a first surface and a second surface opposite to each other, and a second prism disposed on a side where the second surface of the first prism is located. The first surface includes first dimming portions, each of which includes two first side surfaces. Edges of the two first side surfaces away from the second surface intersect at a first intersection line. A surface of the second prism proximate to the second surface includes second dimming portions, each of which includes two second side surfaces. Edges of the two second side surfaces proximate to the second surface intersect at a second intersection line. A distance between orthographic projections of two adjacent first intersection lines on the second surface is less than a distance between orthographic projections of two adjacent second intersection lines on the second surface.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: February 6, 2024
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyan Tu, Ting Cui, Chengkun Liu, Hongyu Zhao, Ming Li, Shaochuan Ouyang, Dingjie Zheng, Yuhang Lin, Hui Yu, Long Hu, Han Zhang, Liri Chen, Jie Liu, Panhong Xu, Ming Chen
  • Patent number: 11892812
    Abstract: The present disclosure provides a gimbal adjustment method. The method includes obtaining a reference image frame sequence and a reference shooting trajectory formed by a movement of a mobile platform when shooting the reference image frame sequence, the reference image frame sequence including two or more reference image frames, the mobile platform including a gimbal and an imaging assembly; estimating a shooting angle based on the reference shooting trajectory, and adjusting the gimbal based on an estimated shooting angle during an image re-shooting; obtaining a current image frame; and determining an amount of adjustment control of the gimbal based on the current image frame and the reference image frame sequence, and adjusting the gimbal based on the amount of adjustment control.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: February 6, 2024
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: You Zhou, Jie Liu, Changchun Ye
  • Patent number: 11894080
    Abstract: An apparatus disclosed herein comprises: a plurality of memory cells and a control circuit coupled to the plurality of memory cells. The control circuit is configured to: acquire a first set of read levels on a wordline of a first block of pages of memory cells; acquire a second set of read levels on a first wordline of a second block of pages of a second set of memory cells in response to determining that the fail bit count of the page after a read operation is above the threshold amount; and acquire a third set of read levels on a second wordline of the second block in response to determining that the fail bit count of the page after the second read operation is above the threshold amount.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: February 6, 2024
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Erika Penzo, Henry Chin, Jie Liu, Dong-Il Moon
  • Patent number: 11890254
    Abstract: A neck massaging device includes an elastic arm, a handle, a connecting member, an electrode assembly, and an electric pulse generating device. The handle includes a first outer shell and a first inner shell. The first outer shell includes a connecting end and a free end opposite to the connecting end, and the first inner shell is buckled with the first outer shell. The connecting member is for connecting the handle to the elastic arm. The connecting member is connected to the connecting end of the handle and buckled with the first inner shell. The electric pulse generating device is electrically connected with the electrode assembly. The free end of the handle may swing with the connecting member as a pivot under an action of external force to drive the first inner shell to be separated from the connecting member.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 6, 2024
    Assignee: GUANGDONG SKG INTELLIGENT TECHNOLOGY CO., LTD
    Inventors: Jie Liu, Hua Xiao, Xianjie Yu
  • Publication number: 20240036740
    Abstract: A non-volatile memory system separately performs a memory operation for multiple sub-blocks of a block in order from previously determined slowest sub-block of the block to a previously determined faster sub-block of the block. As a slower sub-block is more likely to fail, this order of is more likely to identify a failure earlier in the process thereby saving time and reducing potential for a disturb. In some embodiments, the proposed order of operation can be used in conjunction with a programming process that concurrently programs blocks in multiple planes using completion of programming of a fastest plane to a data state as a trigger to test for program failure of other planes to the data state.
    Type: Application
    Filed: November 9, 2022
    Publication date: February 1, 2024
    Applicant: SanDisk Technologies LLC
    Inventors: Yihang Liu, Xiaochen Zhu, Jie Liu, Sarath Puthenthermadam, Jiahui Yuan, Feng Gao
  • Patent number: 11886357
    Abstract: A memory includes: a control chip; and a plurality of storage chips, in which the plurality of storage chips are electrically connected with the control chip via a common communication channel, the plurality of storage chips include a first storage chip set and a second storage chip set, the storage chips in the first storage chip set are configured to perform information interaction with the control chip by adopting a first clock signal, the storage chips in the second storage chip set are configured to perform information interaction with the control chip by adopting a second clock signal, and phase of the first clock signal is different from phase of the second clock signal.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: January 30, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Shu-Liang Ning, Jun He, Zhan Ying, Jie Liu
  • Patent number: 11881185
    Abstract: A display module is provided. The display module includes a main display panel, an auxiliary display panel and a backlight module which are laminated sequentially, at least one temperature sensing circuit in the auxiliary display panel, and a control circuit coupled to the at least one temperature sensing circuit. The temperature sensing circuit is configured to generate, based on temperature of the auxiliary display panel, a temperature signal related to the temperature, and the control circuit is configured to adjust a display parameter of the main display panel based on the temperature signal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: January 23, 2024
    Assignees: Fuzhou BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Hui Yu, Xin Fang, Kai Diao, Jie Liu, Chengkun Liu, Xin Chen
  • Publication number: 20240012499
    Abstract: A touch sensor includes a substrate, sensing channels, and a protective layer. The sensing channels are disposed at intervals on a surface of the substrate, and any one of the sensing channels includes an electrode portion and a silver trace portion electrically connected to the electrode portion. The protective layer is disposed on the substrate and covers and encapsulates the sensing channels. After the touch sensor is subjected to a salt spray test with sodium chloride solution of a mass percentage concentration of 5% at a rate of 1 mL/H to 2 mL/H under an ambient temperature of 35° C. for 48 hours, a resistance change rate of any one of the sensing channels is less than or equal to 10%, and a resistance distribution difference between the sensing channels is less than or equal to 10%.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Inventors: Shao Jie LIU, Si Qiang XU, Chien Hsien YU, Chia Jui LIN, Jian ZHANG, Wei Na CAO, Mei Fang LAN, Jun Hua HUANG, Mei Fen BAI, Song Xin WANG
  • Patent number: 11867758
    Abstract: Embodiments of the present disclosure provide a test method and apparatus for a control chip, and an electronic device, which relate to the field of semiconductor device test technologies. The control chip includes a built-in self-test BIST circuit. The method is performed by the BIST circuit. The method includes: reading first test vectors stored in a first target memory chip; sending the first test vectors to the control chip; receiving first output information returned by the control chip in response to the first test vectors; and acquiring a first test result of the control chip based on the first output information and the first test vectors corresponding to the first output information. By means of the technical solutions provided in the embodiments of the present disclosure, so that a storage space for test vectors can be enlarged, and the test efficiency can be increased.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: January 9, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Chuanqi Shi, Heng-Chia Chang, Li Ding, Jie Liu, Jun He, Zhan Ying
  • Publication number: 20240007746
    Abstract: A focus chasing method includes: determining a current preview picture from a target image acquired by a terminal; determining a position area of the current preview picture in the target image in response to determining that there is a target focus chasing object in the current preview picture; and performing focus chasing on the target focus chasing object in the current preview picture according to the position area.
    Type: Application
    Filed: October 31, 2022
    Publication date: January 4, 2024
    Inventors: Hao CHEN, Jie LIU
  • Patent number: 11862268
    Abstract: Embodiments of the present disclosure provide a test method and apparatus for a control chip, an electronic device, relating to the field of semiconductor device test technology. The method includes: reading first test vectors stored in a first target memory chip; sending the first test vectors to the control chip; receiving first output information returned by the control chip in response to the first test vectors; and acquiring a first test result of the control chip based on the first output information and the first test vectors corresponding to the first output information. By means of the technical solutions provided in the embodiments of the present disclosure, a memory chip can be used for storing test vectors for a control chip, so that a storage space for test vectors can be enlarged, and the test efficiency can be increased.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: January 2, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Chuanqi Shi, Heng-Chia Chang, Li Ding, Jie Liu, Jun He, Zhan Ying
  • Patent number: 11860271
    Abstract: The present disclosure relates to spherical dual-polarization phased array weather radar. The spherical dual-polarization phased array weather radar comprises a spherical crown phased array antenna module, a digital transceiver module and a signal processing module, wherein the spherical crown phased array antenna module comprises a spherical support frame and a plurality of dual-polarization micro-strip radiation units; the dual-polarized micro-strip radiation units are tightly arranged on the spherical support frame; the spherical crown phased array antenna module is used for detecting weather; wireless transmission is carried out between the digital transceiver module and the spherical crown phased array antenna module; the digital transceiver module is used for generating a frequency modulation signal or a phase coding signal required for detecting meteorological targets and receiving an echo signal reflected by the target; and the signal processing module is connected with the digital transceiver module.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: January 2, 2024
    Assignee: Meteorological Observation Centre of China Meteorological Administration
    Inventors: Yuchun Gao, Chen Li, Yubao Chen, Hu Chen, Changxing Li, Jianbing Lu, Haihe Liang, Xiaopeng Wang, Yingchun Chen, Zhichao Bu, Xu Han, Nan Shao, Jie Liu
  • Patent number: 11854941
    Abstract: Embodiments provide a method for packaging a semiconductor, a semiconductor package structure, and a package. The method includes: providing a substrate wafer having a first surface and a second surface arranged opposite to each other, the first surface having a plurality of grooves, a plurality of electrically conductive pillars being provided at a bottom of the groove, and the electrically conductive pillar penetrating through the bottom of the groove to the second surface; providing a plurality of semiconductor die stacks; placing the semiconductor die stack in the groove; and covering a cover plate wafer on the first surface of the substrate wafer to seal up the groove so as to form a semiconductor package structure, a gap between the substrate wafer, the semiconductor die stack and the cover plate wafer being not filled with a filler.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: December 26, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jie Liu, Zhan Ying
  • Patent number: 11856733
    Abstract: Provided is a cold plate including: a heat absorption space for a working medium to be filled therein; a heat transfer structure disposed on a base within the heat absorption space for transferring thermal energy generated from a heat source that is in contact with the base to the working medium; and a flow guide structure disposed in the heat absorption space for guiding the working medium. The flow guide structure of the cold plate can effectively improve the efficiency of thermal energy absorption of the working medium.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: December 26, 2023
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-An Chen, Chien-Yu Chen, Yu-Jie Liu
  • Publication number: 20230408412
    Abstract: The present disclosure provides the use of a fluorescent imaging plate reader (FLIPR) high-throughput real-time fluorescence detection and analysis system in detection of calcium signals in plants, which successfully applies the FLIPR to the detection of calcium signals in plants, and increases the use of the FLIPR in the detection of calcium signals in plants. In addition, a method for detecting calcium signals in plants based on FLIPR provided by the present disclosure detects changes in calcium signals generated by stimulation of plants by an exogenous calcium signal CaCl2 solution, which is the basis of high-throughput real-time fluorescence detection of calcium ions in plants.
    Type: Application
    Filed: December 7, 2022
    Publication date: December 21, 2023
    Inventors: Jie LIU, Yin YI, Jiyi GONG, Ming TANG, Ximin ZHANG, Yuke LI, Yubin ZHANG
  • Publication number: 20230406923
    Abstract: Methods are provided for treating a subject with an anti-CD47 agent.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 21, 2023
    Inventors: Irving L. Weissman, Mark P. Chao, Ravindra Majeti, Jie Liu, Jens-Peter Volkmer
  • Publication number: 20230407276
    Abstract: The present disclosure provides variant CRISPR-Cas effector polypeptides, as well as engineered guide nucleic acids, and systems comprising the same. The present disclosure provides methods of modifying a target nucleic acid, using a variant CRISPR-Cas effector polypeptide of the present disclosure.
    Type: Application
    Filed: December 1, 2021
    Publication date: December 21, 2023
    Inventors: Jennifer A. Doudna, Evangelina Nogales De La Morena, Jun-Jie Liu, Connor Andrew Tsuchida
  • Patent number: 11847383
    Abstract: A method for determining a performance of a subgrade of an expressway section and a processing device thereof are used to accurately calculate a stress, a displacement, a velocity and an acceleration at any position inside the subgrade while analyzing the performance of the subgrade of the target expressway section, in full consideration of the moving speed and vibration characteristics of the vehicle load, the layered characteristics of the expressway and the unsaturated characteristics of the subgrade soil.
    Type: Grant
    Filed: November 12, 2022
    Date of Patent: December 19, 2023
    Assignee: INSTITUTE OF ROCK AND SOIL MECHANICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Zheng Lu, Chuxuan Tang, Hailin Yao, Yang Zhao, Jie Liu