Patents by Inventor Jim Hays

Jim Hays has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6948094
    Abstract: Processor implementation-specific instructions save a processor state in a system memory and attempt to correct the error. Control is then transferred to processor-independent instructions. Control is returned to the processor implementation-specific instructions which then return to an interrupted context of the processor by restoring the processor state.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: September 20, 2005
    Assignee: Intel Corporation
    Inventors: Len Schultz, Nhon Toai Quach, Dean Mulla, Jim Hays, John Fu
  • Publication number: 20030074601
    Abstract: Processor implementation-specific instructions save a processor state in a system memory and attempt to correct the error. Control is then transferred to processor-independent instructions. Control is returned to the processor implementation-specific instructions which then return to an interrupted context of the processor by restoring the processor state.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 17, 2003
    Inventors: Len Schultz, Nhon Toai Quach, Dean Mulla, Jim Hays, John Wai Cheong Fu
  • Patent number: 6088780
    Abstract: A method and apparatus for implementing a page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address. According to one aspect of the invention, an apparatus for use in a computer system is provided that includes a page size storage area and a page table walker. The page size storage area is used to store a number of page sizes each selected for translating a different set of virtual addresses. The page table walker includes a selection unit coupled to the page size storage area, as well as a page entry address generator coupled to the selection unit. For each of the virtual address received, the selection unit positions a field in that virtual address based on the page size selected for translating the set of virtual addresses to which that virtual address belongs.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: July 11, 2000
    Assignee: Institute for the Development of Emerging Architecture, L.L.C.
    Inventors: Koichi Yamada, Gary N. Hammond, Jim Hays, Jonathan Kent Ross, Stephen Burger, William R. Bryg