Abstract: The present invention relates to a method for fabricating a ferroelectric random access memory (FeRAM) device. The method includes the steps of: forming a first inter-layer insulation layer on a substrate; forming a storage node contact connected with a partial portion of the substrate by passing through the first inter-layer insulation layer; forming a lower electrode connected to the storage node contact on the first inter-layer insulation layer; forming a second inter-layer insulation layer having a surface level lower than that of the lower electrode so that the second inter-layer insulation layer encompasses a bottom part of the lower electrode; forming an impurity diffusion barrier layer encompassing an upper part of the lower electrode on the second inter-layer insulation layer; forming a ferroelectric layer on the lower electrode and the impurity diffusion barrier layer; and forming a top electrode on the ferroelectric layer.

Abstract: A nonvolatile ferroelectric memory and method for fabricating the same include shunt lines to reduce RC delay on wordlines in the memory. A unit cell of the nonvolatile ferroelectric memory can include first and second bitlines, first and second transistors, first and second ferroelectric capacitors, a first split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the first transistor and a first electrode of the second ferroelectric capacitor, and a second split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the second transistor and a first electrode of the first ferroelectric capacitor. First shunt lines in a plurality of separation layers are over the first split wordlines and are coupled to the first split wordlines. Second shunt lines of the plurality of separation layers are over the second split wordline and are coupled to the second split wordline.

Abstract: A nonvolatile ferroelectric memory and method for fabricating the same include shunt lines to reduce RC delay on wordlines in the memory. A unit cell of the nonvolatile ferroelectric memory can include first and second bitlines, first and second transistors, first and second ferroelectric capacitors, a first split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the first transistor and a first electrode of the second ferroelectric capacitor, and a second split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the second transistor and a first electrode of the first ferroelectric capacitor. First shunt lines in a plurality of separation layers are over the first split wordlines and are coupled to the first split wordlines. Second shunt lines of the plurality of separation layers are over the second split wordline and are coupled to the second split wordline.

Abstract: A nonvolatile ferroelectric memory and method for fabricating the same include shunt lines to reduce RC delay on wordlines in the memory. A unit cell of the nonvolatile ferroelectric memory can include first and second bitlines, first and second transistors, first and second ferroelectric capacitors, a first split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the first transistor and a first electrode of the second ferroelectric capacitor, and a second split wordline formed in a direction to cross the first and second bitlines and coupled to a gate of the second transistor and a first electrode of the first ferroelectric capacitor. First shunt lines in a plurality of separation layers are over the first split wordlines and are coupled to the first split wordlines. Second shunt lines of the plurality of separation layers are over the second split wordline and are coupled to the second split wordline.

Abstract: A nonvolatile ferroelectric memory device and driving circuit for driving the same reduce a device size and increase a device driving capability. The nonvolatile ferroelectric memory device includes first and second cell arrays each having sub cell arrays, a local X decoder that outputs a plurality of driving signals for driving split wordlines in the first and second cell arrays, and a first local wordline driver that selectively applies the driving signals to the first cell array and a second local wordline driver that selectively applies the driving signals to the second cell array. A main wordline driver outputs a first control signal that activates the first local wordline driver and a second control signal that activates the second local wordline.

Abstract: A color correction device, for strengthening or weakening a specific color according to the selection of a user, is provided. In a color correction device, the area of an input color signal is determined according to chrominance axes, coefficients of a corresponding coordinate of the chrominance axes are read from a storage memory, and a matrix operation is performed on the input color signal before it is output. An index table divides the area defined by chrominance axes on the basis of r, g, and b signals. A storage memory contains coefficients corresponding to the respective coordinate positions for correcting the color signal to represent colors similarly to the original color of the subject. A specific color may be strengthened or weakened based on the selection of a user, due to the addition of a second storage memory which contains, coefficient tables for designating areas according to the chrominance axes corresponding to a color to be strengthened or weakened.

Abstract: A color correction device is disclosed for correcting color distortion in a displayed television image. Internal circuitry of a television receiver has a color signal distortion characteristic, and the cathode ray tube (CRT) in the television receiver has a gamma characteristic according to which display color is distorted. The color correction device includes an average luminance level calculator for calculating the average luminance level of an image signal displayed by the CRT. Based on the average luminance level calculated by the average luminance lever calculator, a selection is made of appropriate sets from a plurality of available sets of coefficient correction values and a plurality of sets of gamma correction values. The color signal input to the television receiver is then corrected according to the selected sets of coefficient correction values and gamma correction values.

Abstract: A method of fabricating a capacitor of a semiconductor device is disclosed including the steps of forming a first polysilicon layer and an insulating layer on a semiconductor substrate, implanting ions into the insulating layer to form an ion-implanted layer, patterning the insulating layer including the ion-implanted layer, etching the insulating layer pattern, forming a second polysilicon layer on the insulating layer, removing the insulating layer and the ion-implanted layer, and forming a dielectric layer and a third polysilicon layer on the first and second polysilicon layers.