Patents by Inventor Jin-Ho Jeon

Jin-Ho Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090075489
    Abstract: A processing chamber is seasoned by providing a flow of season precursors to the processing chamber. A high-density plasma is formed from the season precursors by applying at least 7500 W of source power distributed with greater than 70% of the source power at a top of the processing chamber. A season layer having a thickness of at least 5000 ? is deposited at one point using the high-density plasma. Each of multiple substrates is transferred sequentially into the processing chamber to perform a process that includes etching. The processing chamber is cleaned between sequential transfers of the substrates.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 19, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Anchuan Wang, Young S. Lee, Manoj Vellaikal, Jason Thomas Bloking, Jin Ho Jeon, Hemant P. Mungekar
  • Publication number: 20090068853
    Abstract: Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched back. This includes flowing a halogen precursor through a first conduit from a halogen-precursor source to the substrate processing chamber, forming a high-density plasma from the halogen precursor, and terminating flowing the halogen precursor after the portion has been etched back. Thereafter, a halogen scavenger is flowed to the substrate processing chamber to react with residual halogen in the substrate processing chamber. Thereafter, a second portion of the silicon oxide film is deposited over the first portion of the silicon oxide film and within the gap using a high-density plasma process.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 12, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Anchuan Wang, Young S. Lee, Manoj Vellaikal, Jason Thomas Bloking, Jin Ho Jeon, Hemant P. Mungekar
  • Publication number: 20090017595
    Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.
    Type: Application
    Filed: September 18, 2008
    Publication date: January 15, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
  • Publication number: 20080299775
    Abstract: Methods are disclosed for depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A silicon-containing gas, an oxygen-containing gas, and a fluent gas are flowed into the substrate processing chamber. A high-density plasma is formed from the silicon-containing gas, the oxygen-containing gas, and the fluent gas. A first portion of the silicon oxide film is deposited using the high-density plasma at a deposition rate between 900 and 6000 ?/min and with a deposition/sputter ratio greater than 30. The deposition/sputter ratio is defined as a ratio of a net deposition rate and a blanket sputtering rate to the blanket sputtering rate. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched. A second portion of the silicon oxide film is deposited over the etched portion of the silicon oxide film.
    Type: Application
    Filed: June 4, 2007
    Publication date: December 4, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Anchuan Wang, Young S. Lee, Manoj Vellaikal, Jason Thomas Bloking, Jin Ho Jeon, Hemant P. Mungekar
  • Patent number: 7446367
    Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: November 4, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
  • Publication number: 20070197014
    Abstract: A method of fabricating a semiconductor device includes forming an interlayer insulating layer on a semiconductor substrate, forming a hard mask layer on the interlayer insulating layer, forming a hard mask pattern in which a plurality of contact hole patterns are formed by patterning the hard mask layer at least two times, conformally forming a supporting liner layer on the hard mask pattern, which supports the hard mask pattern during etching by reinforcing the thickness of the hard mask pattern, forming a plurality of contact hole patterns in the interlayer insulating layer using the hard mask pattern on which the supporting liner layer is formed as an etching mask, and forming contact plugs filling the plurality of contact hole patterns.
    Type: Application
    Filed: February 6, 2007
    Publication date: August 23, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-ho Jeon, Cha-won Koh, Yun-sook Chae, Gi-sung Yeo, Tae-young Kim
  • Patent number: 7183214
    Abstract: In one embodiment, a semiconductor substrate is placed into a process chamber. A gas mixture including a silicon-containing gas, a fluorine-containing gas, an inert gas, and an oxygen gas is introduced into the chamber at a pressure range of from about 30 mTorr to about 90 mTorr. During this time, deposition and etching processes are concurrently performed using a plasma to form a high-density plasma (HDP) insulating layer on the semiconductor substrate. A ratio of deposition to etching is from about 3:1 to about 10:1. A ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is less than about 0.9.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: February 27, 2007
    Assignee: Samsung Electronics Co., Lgd.
    Inventors: Jeong-Hoon Nam, Jin-Ho Jeon
  • Patent number: 7180129
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Publication number: 20070026630
    Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.
    Type: Application
    Filed: May 30, 2006
    Publication date: February 1, 2007
    Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
  • Publication number: 20060223321
    Abstract: In one embodiment, a semiconductor substrate is placed into a process chamber. A gas mixture including a silicon-containing gas, a fluorine-containing gas, an inert gas, and an oxygen gas is introduced into the chamber at a pressure range of from about 30 mTorr to about 90 mTorr. During this time, deposition and etching processes are concurrently performed using a plasma to form a high-density plasma (HDP) insulating layer on the semiconductor substrate. A ratio of deposition to etching is from about 3:1 to about 10:1. A ratio of a flow rate of the fluorine-containing gas to a flow rate of the silicon-containing gas is less than about 0.9.
    Type: Application
    Filed: September 22, 2005
    Publication date: October 5, 2006
    Inventors: Jeong-Hoon Nam, Jin-Ho Jeon
  • Publication number: 20060060143
    Abstract: In an apparatus and a method of uniformly forming a high quality thin layer, first and second gas lines are arranged on an inner surface of a processing chamber alternately with and spaced apart from each other by a same interval. The first and second gas lines have the same shape, and are positioned on a circumferential line farther than a peripheral portion of the substrate from the central axis of the substrate. An injection hole is formed on a shear plane of the gas lines. A first source gas, a reaction gas and a subsidiary gas area are supplied through the first gas line, and a second source gas is supplied through the second gas line. Accordingly, because of the spacing of the gas lines from the substrate, particles are prevented from being dropping onto the substrate and the apparatus may be repaired in a much shorter time, thereby remarkably improving maintenance efficiency of the apparatus.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 23, 2006
    Inventors: Min-Woo Lee, Jin-Ho Jeon, Kyoung-Sub Lee, Young-Chol Kwon
  • Publication number: 20050160982
    Abstract: A plasma enhanced chemical vapor deposition apparatus includes a process chamber, and at least one gas injection pipe extending within the process chamber. Each gas injection pipe has an injection region from which source gases are injected through the sidewall of the pipe into the process chamber. To this end, a plurality of slots are located in the injection region. The slots minimize the likelihood that the source gas will be converted to plasma within the gas injection pipe. Accordingly, particle contamination can be minimized.
    Type: Application
    Filed: December 2, 2004
    Publication date: July 28, 2005
    Inventors: Min-no Ha, Jin-Ho Jeon, Yi-Ha Jeong
  • Publication number: 20050072991
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 7, 2005
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Patent number: 6858062
    Abstract: A residual gas removing device for a gas supply apparatus in a semiconductor fabricating facility, includes a low stress valve disposed between a mass flow controller and a chamber. The low stress valve alternately supplies or cuts off a gas from the mass flow controller to the chamber. A WF6 gas removing apparatus is in flow communication with a gas inlet line of the low stress valve to remove a residual WF6 gas in the gas inlet line, before proceeding with a subsequent deposition step.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: February 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Hwan Choi, Jin-Ho Jeon, Yong-Gab Kim, Jong-Seung Yi, Min-Woo Lee, Kyung-Tae Kim, Chan-Hyung Cho
  • Patent number: 6838645
    Abstract: A heater assembly that is capable of uniformly heating a wafer in an apparatus for manufacturing a semiconductor device is provided. The heater assembly preferably includes a susceptor configured to support a substrate (wafer). A plurality of heaters can be disposed under the susceptor to heat the wafer. A support is preferably disposed below the heaters to support the heaters, and a power supply provides an electric current to operate the heaters. The support can include a heat-shielding portion that restricts heat conduction between the heaters. The heat-shielding portion preferably comprises heat-resistant material arranged in a groove formed on the support. The heat-shielding portion also preferably supports adjacent peripheral portions of the heaters. Electrical current provided to the heaters is preferably controlled such that the temperature of the heaters are operated in a range of about 390° C. to 420° C.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: January 4, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Hwan Choi, Jin-Ho Jeon, Yong-Gab Kim, Sung-Hwan Jang, Dong-Won Lee, Min-Woo Lee, Kyung-Tae Kim
  • Patent number: 6730619
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 4, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Publication number: 20030199146
    Abstract: An insulating layer having a BPSG layer, a semiconductor device and methods for fabricating them. After preparing an oxidizing atmosphere using an oxygen gas, a first seed layer is formed with a tetraethylorthosilicate (TEOS) and the oxygen gas. Thereafter, a second seed layer, used to form an insulating layer capable of controlling an amount of a boron, is formed by means of using a triethylborate (TEB), the TEOS and the oxygen gas. Then, the insulating layer having a BPSG layer is formed using the TEB, a triethylphosphate, the TEOS and an ozone gas. About 5.25 to 5.75% by weight of the boron and about 2.75 to 4.25% by weight of the phosphorous are added to the insulating layer.
    Type: Application
    Filed: March 19, 2003
    Publication date: October 23, 2003
    Inventors: Jin-Ho Jeon, Byoung-Deog Choi, Jong-Seung Yi, Tae-Wook Seo
  • Patent number: 6569782
    Abstract: An insulating layer having a BPSG layer, a semiconductor device and methods for fabricating them. After preparing an oxidizing atmosphere using an oxygen gas, a first seed layer is formed with a tetraethylorthosilicate (TEOS) and the oxygen gas. Thereafter, a second seed layer, used to form an insulating layer capable of controlling an amount of a boron, is formed by means of using a triethylborate (TEB), the TEOS and the oxygen gas. Then, the insulating layer having a BPSG layer is formed using the TEB, a triethylphosphate, the TEOS and an ozone gas. About 5.25 to 5.75% by weight of the boron and about 2.75 to 4.25% by weight of the phosphorous are added to the insulating layer.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: May 27, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Jeon, Byoung-Deog Choi, Jong-Seung Yi, Tae-Wook Seo
  • Publication number: 20030080109
    Abstract: A heater assembly that is capable of uniformly heating a wafer in an apparatus for manufacturing a semiconductor device is provided. The heater assembly preferably includes a susceptor configured to support a substrate (wafer). A plurality of heaters can be disposed under the susceptor to heat the wafer. A support is preferably disposed below the heaters to support the heaters, and a power supply provides an electric current to operate the heaters. The support can include a heat-shielding portion that restricts heat conduction between the heaters. The heat-shielding portion preferably comprises heat-resistant material arranged in a groove formed on the support. The heat-shielding portion also preferably supports adjacent peripheral portions of the heaters. Electrical current provided to the heaters is preferably controlled such that the temperature of the heaters are operated in a range of about 390° C. to 420° C.
    Type: Application
    Filed: October 8, 2002
    Publication date: May 1, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chul-Hwan Choi, Jin-Ho Jeon, Yong-Gab Kim, Sung-Hwan Jang, Dong-Won Lee, Min-Woo Lee, Kyung-Tae Kim
  • Publication number: 20020130385
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Application
    Filed: April 16, 2002
    Publication date: September 19, 2002
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi