Patents by Inventor Jin-Ho So

Jin-Ho So has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200028239
    Abstract: An antenna module includes: an antenna substrate including an antenna pattern; a semiconductor package disposed on a lower surface of the antenna substrate, electrically connected to the antenna substrate, and having at least one semiconductor chip embedded therein; and an electronic component disposed on the lower surface or a side surface of the antenna substrate, electrically connected to the antenna substrate, and spaced apart from the semiconductor package by a predetermined distance. The electronic component has a thickness greater than that of the semiconductor chip.
    Type: Application
    Filed: March 4, 2019
    Publication date: January 23, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won Wook So, Jin Seon Park, Young Sik Hur, Jung Chul Gong, Yong Ho Baek
  • Patent number: 10495528
    Abstract: Provided herein is a capacitive torque sensor, which can completely offset forces/torques in all axial directions, except for force/torque in a direction of a central axis, by measuring variations in capacitances of four sensing cells arrayed at angular intervals of 90 degrees on the basis of a center of the sensor and can offer a sensing value for the torque in a central axis direction.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: December 3, 2019
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Hyouk Ryeol Choi, Ui Kyum Kim, Yong Bum Kim, Dong-Yeop Seok, Jin Ho So
  • Publication number: 20190229055
    Abstract: A fan-out sensor package includes: a first semiconductor chip module including a first connection member having a first through-hole and a first wiring layer, a first semiconductor chip disposed in the first through-hole and having an active surface on which a sensing region and first connection pads are disposed, and an encapsulant encapsulating at least portions of the first connection member and the first semiconductor chip and filling at least portions of the first through-hole; a redistribution module having a second through-hole exposing at least a portion of the sensing region and including a redistribution layer; and electrical connection structures electrically connecting the first wiring layer and the first connection pads to the redistribution layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: July 25, 2019
    Inventors: Won Wook SO, Jin Seon PARK, Young Sik HUR, Yong Ho BAEK
  • Publication number: 20190157560
    Abstract: The purpose of the present invention is to provide a compound that can improve the lifespan, low drive voltage and high luminous efficiency of an element, an organic electronic element using same, and an electronic device comprising same.
    Type: Application
    Filed: January 29, 2019
    Publication date: May 23, 2019
    Applicant: DUK SAN NEOLUX CO., LTD
    Inventors: Yun Suk LEE, Seul-gi KIM, Dae Sung KIM, Ki Ho SO, Dae Hwan OH, Jin Ho YUN, Bum Sung LEE, Seong Je PARK
  • Patent number: 10297758
    Abstract: The purpose of the present invention is to provide a compound that can improve the lifespan, low drive voltage and high luminous efficiency of an element, an organic electronic element using same, and an electronic device comprising same.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: May 21, 2019
    Assignee: Duk San Neolux Co., Ltd.
    Inventors: Yun Suk Lee, Seul-gi Kim, Dae Sung Kim, Ki Ho So, Dae Hwan Oh, Jin Ho Yun, Bum Sung Lee, Seong Je Park
  • Publication number: 20180274995
    Abstract: Provided herein is a capacitive torque sensor, which can completely offset forces/torques in all axial directions, except for force/torque in a direction of a central axis, by measuring variations in capacitances of four sensing cells arrayed at angular intervals of 90 degrees on the basis of a center of the sensor and can offer a sensing value for the torque in a central axis direction.
    Type: Application
    Filed: March 22, 2018
    Publication date: September 27, 2018
    Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Hyouk Ryeol CHOI, Ui Kyum KIM, Yong Bum KIM, Dong-Yeop SEOK, Jin Ho SO
  • Patent number: 9059472
    Abstract: A winder for an electrode assembly of a rechargeable battery for improving space usage is disclosed. The winder includes a plurality of spools supplying a negative electrode member, a positive electrode member, a first separator member, and a second separator member, a mandrel stacking and spirally winding the first separator member, the negative electrode member, the second separator member, and the positive electrode member supplied by the spool, a first frame accommodating a predetermined number of spools from among the plurality of spools and the mandrel, a second frame connected to the first frame and accommodating other spools from among the plurality of spools, a reorienter installed between the first frame and the second frame and reorienting a progressing direction of one of the members, and a position controller controlling a position of the member that passes through the reorienter and progresses towards the mandrel.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 16, 2015
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Hwan Kim, Yi-Hyun Chang, Kyung-Do Park, Jin-Ho So, Soon-Hak Hwang
  • Publication number: 20140117141
    Abstract: Disclosed is a winder for an electrode assembly of a rechargeable battery for improving space usage. The winder includes a plurality of spools supplying a negative electrode member, a positive electrode member, a first separator member, and a second separator member, a mandrel stacking and spirally winding the first separator member, the negative electrode member, the second separator member, and the positive electrode member supplied by the spool, a first frame accommodating a predetermined number of spools from among the plurality of spools and the mandrel, a second frame connected to the first frame and accommodating other spools from among the plurality of spools, a reorienter installed between the first frame and the second frame and reorienting a progressing direction of one of the members, and a position controller controlling a position of the member that passes through the reorienter and progresses towards the mandrel.
    Type: Application
    Filed: March 15, 2013
    Publication date: May 1, 2014
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Hwan Kim, Yi-Hyun Chang, Kyung-Do Park, Jin-Ho So, Soon-Hak Hwang
  • Patent number: 7990168
    Abstract: A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: August 2, 2011
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Jong-hoon Kim, Hyun-ae Lee, Jin-ho So, Kwang-soo Park
  • Patent number: 7751265
    Abstract: In a semiconductor device including a plurality of memory units and a method of testing the same, the semiconductor device includes a plurality of memory units each comprising a plurality of input lines; and an input unit configured to provide a plurality of test signals to the input lines, respectively, included in each of the memory units in response to a test enable signal. A data input/output unit can be configured to receive Z-bit data from test equipment and to distribute the Z-bit data to the plurality of memory units in response to the test enable signal, where Z is a natural number. The data input/output unit outputs K-bit data, which are output from each of the plurality of memory units, through data input/output lines included in the plurality of memory units in response to the test enable signal, where K?Z and K is a natural number.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Ho So, Kwang Hyun Kim, Chan Jin Park
  • Publication number: 20100141289
    Abstract: A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-hoon KIM, Hyun-ae Lee, Jin-ho So, Kwang-soo Park
  • Publication number: 20080198675
    Abstract: In a semiconductor device including a plurality of memory units and a method of testing the same, the semiconductor device includes a plurality of memory units each comprising a plurality of input lines; and an input unit configured to provide a plurality of test signals to the input lines, respectively, included in each of the memory units in response to a test enable signal. A data input/output unit can be configured to receive Z-bit data from test equipment and to distribute the Z-bit data to the plurality of memory units in response to the test enable signal, where Z is a natural number. The data input/output unit outputs K-bit data, which are output from each of the plurality of memory units, through data input/output lines included in the plurality of memory units in response to the test enable signal, where K?Z and K is a natural number.
    Type: Application
    Filed: December 10, 2007
    Publication date: August 21, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Ho So, Kwang Hyun Kim, Chan Jin Park
  • Publication number: 20080180120
    Abstract: A probe card to connect a semiconductor device to test equipment includes a Printed Circuit Board (PCB) in which an electrical wiring pattern is formed, a first connector fixed on an upper surface of the PCB to connect the test equipment to the PCB, probe needles connected to electrode pads of the semiconductor device, and a Flexible PCB (FPCB) to connect the PCB to the probe needles. Accordingly, a signal transmission characteristic can be enhanced, test expenses can be reduced, and ground noise can be reduced.
    Type: Application
    Filed: December 19, 2007
    Publication date: July 31, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-hoon KIM, Hyun-ae Lee, Jin-ho So, Kwang-soo Park
  • Patent number: 7324399
    Abstract: A refresh control circuit and semiconductor devices that may include an address counter for generating a counting address, a repetition address selector for generating a repetition address, a repetition refresh controller for generating a refresh repetition signal based on the counting address and repetition address, and a row decoder for selecting a row of a memory bank based on the counting address and the refresh repetition signal. A method for performing a refresh operation on a semiconductor device that may include receiving a refresh trigger, generating a counting address, generating a repetition address corresponding to a row having a degraded memory cell, providing a refresh repetition signal based on a comparison of the counting address and repetition address, and selecting a row to be refreshed based on one or more of the counting address, repetition address, and the refresh repetition address.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Young Min Jang, Jin Ho So, Hyung Dong Kim
  • Patent number: 6944737
    Abstract: Memory modules and methods of testing memory modules are provided that include at least one memory device responsive to a memory clock signal having a memory clock frequency and a data buffer. The data buffer is responsive to a buffer clock signal having a first buffer clock frequency that is different from the memory clock frequency during a normal mode of operation and having a second buffer clock frequency that is equal to the memory clock frequency during a test mode of operation.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: September 13, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-man Ahn, Jin-ho So, Byung-se So
  • Patent number: 6883061
    Abstract: An electronic system having a plurality of dynamic semiconductor memory devices and a refresh method for the same. The system comprises a plurality of dynamic semiconductor memory devices and a controller. Each of the dynamic semiconductor memory devices includes a storage device for storing a designated number designating an order for performing a refresh operation, a refresh enable signal generating circuit for generating a refresh enable signal in response to a refresh control command supplied from the controller and a delaying circuit for delaying the refresh enable signal by different time intervals determined by the designated number.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: April 19, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheul Seo, Jin-Ho So, Hui-Chong Shin, Meoung-Cheol Nam
  • Patent number: 6754112
    Abstract: An integrated circuit device includes a delay circuit that is configured to delay a clock signal and is further configured to generate an output data signal in response to the delayed clock signal and an input data signal. Multiple devices are configured to respectively receive the output data signal in response to the clock signal.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: June 22, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-man Ahn, Jin-ho So, Byung-se So, Seung-jin Seo
  • Publication number: 20030145163
    Abstract: An electronic system having a plurality of dynamic semiconductor memory devices and a refresh method for the same. The system comprises a plurality of dynamic semiconductor memory devices and a controller. Each of the dynamic semiconductor memory devices includes a storage device for storing a designated number designating an order for performing a refresh operation, a refresh enable signal generating circuit for generating a refresh enable signal in response to a refresh control command supplied from the controller and a delaying circuit for delaying the refresh enable signal by different time intervals determined by the designated number.
    Type: Application
    Filed: January 17, 2003
    Publication date: July 31, 2003
    Inventors: Jong-Cheul Seo, Jin-Ho So, Hui-chong Shin, Meoung-Cheol Nam
  • Publication number: 20020135394
    Abstract: Memory modules and methods of testing memory modules are provided that include at least one memory device responsive to a memory clock signal having a memory clock frequency and a data buffer. The data buffer is responsive to a buffer clock signal having a first buffer clock frequency that is different from the memory clock frequency during a normal mode of operation and having a second buffer clock frequency that is equal to the memory clock frequency during a test mode of operation.
    Type: Application
    Filed: March 8, 2002
    Publication date: September 26, 2002
    Inventors: Young-man Ahn, Jin-ho So, Byung-se So
  • Publication number: 20020114195
    Abstract: An integrated circuit device includes a delay circuit that is configured to delay a clock signal and is further configured to generate an output data signal in response to the delayed clock signal and an input data signal. Multiple devices are configured to respectively receive the output data signal in response to the clock signal.
    Type: Application
    Filed: February 11, 2002
    Publication date: August 22, 2002
    Inventors: Young-Man Ahn, Jin-Ho So, Byung-Se So, Seung-Jin Seo