Patents by Inventor Jing Xia

Jing Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200357457
    Abstract: A refresh processing method, apparatus, and system, and memory controllers are provided, to improve memory access efficiency. The refresh processing apparatus includes a plurality of memory controllers that are in one-to-one correspondence with a plurality of memory spaces. Any first memory controller in the plurality of memory controllers is configured to: receive N first indication signals and N second indication signals that are output by N memory controllers other than the first memory controller, where N is greater than or equal to 1; and determine a refresh policy of a first memory space based on at least one of the following information: the N first indication signals, the N second indication signals, and refresh indication information of the first memory space.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 12, 2020
    Inventors: Hengchao XIN, Jing XIA, Yining LI, Zhenxi TU
  • Publication number: 20200328911
    Abstract: Embodiments provide a chip and a related device. In those embodiments, the chip includes a ring network. The ring network includes a first node and a second a node. The first node determines whether a first injection buffer value is greater than a first threshold and whether a first injection bandwidth is less than a first expected bandwidth. When the first injection buffer value is greater than the first threshold and the first injection bandwidth is less than the first expected bandwidth, the first node sends a first request to the second node, where the first request is used to instruct at least one node in the ring network, other than the first node, to reduce a transmission quantity of first data packets. According to the embodiments of this application, a network bandwidth can be properly allocated according to an actual operating status of a system.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Inventors: Qiaoshi Zheng, Xiaowen Wu, Jing Xia, Wen Zong
  • Patent number: 10742879
    Abstract: A panoramic camera device includes: a first substrate having a first surface and an opposite second surface, a first camera module being disposed on the first surface, a first connection port being disposed on the second surface; and a second substrate having a third surface and a fourth surface opposite to the third surface. The fourth surface faces the second surface. A second camera module and a signal output port are disposed on the third surface. A second connection port is disposed on the fourth surface. The first connection port is connected with the second connection port. The first camera module on the first surface and the second camera module on the third surface are back-to-back arranged. The first and second camera modules are positioned in the same optical axis. The signal output port serves to output the image signals generated by the first and second camera modules.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: August 11, 2020
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Wei-Chuan Wang, Jing-Xia Pei, Huan Deng
  • Publication number: 20200252908
    Abstract: A resource allocation method for network slicing and an orchestrator, comprising: uniformly incorporating resources originally bundled statically with the base station into a dynamic resource pool; allocating, by an orchestrator, resources from among the dynamic resource pool for the network slicing based on different network slicing requirements. A static corresponding/mapping relationship between the hardware/radio resources and the base station is broken, such that hardware/radio resources (e.g., radio access network Virtual Network Function (RAN VNF), baseband unit (BBU), RRH (Remote Radio Head) as well as antenna) that originally corresponded to different base stations will be organized as an integrated and dynamic hardware/radio resource pool and reported to the orchestrator, such that the orchestrator will centrally manage all hardware/radio resources in this pool and then sufficiently utilize and dynamically orchestrate these hardware/radio resources based different needs from the network slicing.
    Type: Application
    Filed: January 17, 2018
    Publication date: August 6, 2020
    Applicant: Alcatel Lucent
    Inventors: Yifei Liu, Haobo Xing, Xiaoxing Han, Jing Xia, Xiaogen Jiang, Min Zhang
  • Publication number: 20200175344
    Abstract: An embodiment of the invention may include a method, computer program product and computer system for image identification and classification. The method, computer program product and computer system may include a computing device which may receive one or more images of a first object from at least two angles linguistic data associated with the first object. The computing device may input the one or more images of the first object into one or more first neural networks and the linguistic data of the first object into one or more second neural networks. The computing device may combine the output of the one or more first neural networks and the one or more second neural networks and generate an identification model based on the combined output of the one or more first neural networks and the one or more second neural networks.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 4, 2020
    Inventors: Hongfei Li, Jinfeng Yi, Jing Xia
  • Patent number: 10541579
    Abstract: A wind power generator and stator iron core thereof, and stator iron core module; the iron core module (4) has an overall dimension consistent with a principle of the number of slots per pole per phase q=1; the iron core module (4) is provided with two three-phase winding units therein, an electrical angle formed by the two three-phase winding units is 30 degrees. The method of arranging winding in the stator iron core module (4) is changed to effectively reduce fifth and seventh winding harmonic magnetomotive forces.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: January 21, 2020
    Assignee: XINJIANG GOLDWIND SCIENCE & TECHNOLOGY CO., LTD.
    Inventors: Yazhou Gao, Jing Xia, Xiang Zhao
  • Patent number: 10476697
    Abstract: A network-on-chip and a corresponding method are provided. The network-on-chip includes at least one bufferless ring network in at least one dimension of the network-on-chip. At least one bufferless ring network includes multiple routing nodes, and at least one of the multiple routing nodes is a switching node. Two bufferless ring networks in different dimensions may intersect. The two bufferless ring networks exchange data by using switching nodes. A dedicated slot and a public slot are configured in each bufferless ring network. Only one switching node has permission to use a dedicated slot at a same moment in each bufferless ring network, the permission to use the dedicated slot is transferred successively between switching nodes in each bufferless ring network. The permission to use the dedicated slot is transferred after transmission of data in the dedicated slot is completed.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: November 12, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qiaoshi Zheng, Zhirui Chen, Jing Xia
  • Patent number: 10313097
    Abstract: A bufferless ring network including at least two nodes and at least two timeslots, the at least two timeslots include a dedicated timeslot, and a first node in the bufferless ring network has use permission for the dedicated timeslot. The first node is configured to, in a state of having the use permission for the dedicated timeslot, detect whether all dedicated timeslots that pass through the first node are available, set a permission switch signal, and cancel the use permission for the dedicated timeslot according to the permission switch signal after detecting that all the dedicated timeslots that pass through the first node are available. A remaining node in the bufferless ring network is configured to obtain the use permission for the dedicated timeslot according to the permission switch signal. The remaining node is a node that needs to use the dedicated timeslot.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: June 4, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qiaoshi Zheng, Zhirui Chen, Jing Xia
  • Publication number: 20190119700
    Abstract: Provided are a method for establishing a lentiviral vector system capable of directly reflecting type I interferon response, and applications thereof. The method for establishing the lentiviral vector system comprises: cutting a Gaussia luciferase at the position of amino acid 109, removing 16 amino acids from N-terminus, and cloning the two polypeptides into a lentiviral vector to form a lentiviral BiLC expression vector; and cloning a shuttle plasmid of pEntry-IRF3 or pEntry-IRF5 or pEntry-IRF7 by homologous recombination into the lentiviral BiLC expression vector, so as to construct a lentiviral vector IRF3-BiLC or IRF5-BiLC or IRF7-BiLC capable of directly reflecting type I interferon response.
    Type: Application
    Filed: March 29, 2017
    Publication date: April 25, 2019
    Applicant: Suzhou Ultralmmune Co., Ltd.
    Inventors: Frank XiaoFeng Qin, Fei Wu, Zining Wang, Jingyun Ji, Jing Xia
  • Patent number: 10237475
    Abstract: A camera module includes a first and a second photographing member, and a circuit substrate. The circuit substrate has a first lateral side and an opposite second lateral side, and a plurality of circuits. The first and the second photographing member is provided on the first and the second lateral side of the circuit substrate respectively and electrically connected to the circuit substrate. With these arrangements, the camera module can have overall reduced volume and is able to photographing a 360-degree panoramic image and lower the manufacturing cost.
    Type: Grant
    Filed: January 15, 2017
    Date of Patent: March 19, 2019
    Assignee: Asia Vital Components Co., Ltd.
    Inventors: Wei-Chuan Wang, Jing-Xia Pei, Huan Deng
  • Patent number: 10194887
    Abstract: A display device for ultrasound energy includes a focused ultrasound emitting and receiving device, a processing device and a display. The processing device generates a first electrical signal and transmits it to the focused ultrasound emitting and receiving device to control the focused ultrasound emitting and receiving device to emit at least one first ultrasound signal to a target position of an organism. The target position reflects the first ultrasound signal to form at least one second ultrasound signal. After generating the first electrical signal, the processing device drives the focused ultrasound emitting and receiving device to start to receive the second ultrasound signal only during a preset period after the estimation period. The processing device uses the display to display an image of the target position according to the second ultrasound signal, and brightness of the image is directly proportional to energy intensity of the first ultrasound signal.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: February 5, 2019
    Assignee: CHANG CHUNG UNIVERSITY
    Inventors: Hao-Li Liu, Jing-Jing Xia
  • Patent number: 10135758
    Abstract: A chip is provided, where the chip is formed by packaging at least two dies, and the at least two dies form at least one die group. The die group includes a first die and a second die. A first processing unit and n groups of ports are disposed on the first die, and a second processing unit and m groups of ports are disposed on the second die. The first processing unit is configured to: switch at least one group of first type ports in the n groups of ports from input to output and switch a second type port that is in the m groups of ports and that is coupled to each group of the first type ports from output to input.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 20, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hengchao Xin, Han Lin, Jing Xia
  • Patent number: 10114749
    Abstract: A cache memory system is provided. The cache memory system includes multiple upper level caches and a current level cache. Each upper level cache includes multiple cache lines. The current level cache includes an exclusive tag random access memory (Exclusive Tag RAM) and an inclusive tag random access memory (Inclusive Tag RAM). The Exclusive Tag RAM is configured to preferentially store an index address of a cache line that is in each upper level cache and whose status is unique dirty (UD). The Inclusive Tag RAM is configured to store an index address of a cache line that is in each upper level cache and whose status is unique clean (UC), shared clean (SC), or shared dirty (SD).
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: October 30, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhenxi Tu, Jing Xia
  • Publication number: 20180262682
    Abstract: A panoramic camera device includes: a first substrate having a first surface and an opposite second surface, a first camera module being disposed on the first surface, a first connection port being disposed on the second surface; and a second substrate having a third surface and a fourth surface opposite to the third surface. The fourth surface faces the second surface. A second camera module and a signal output port are disposed on the third surface. A second connection port is disposed on the fourth surface. The first connection port is connected with the second connection port. The first camera module on the first surface and the second camera module on the third surface are back-to-back arranged. The first and second camera modules are positioned in the same optical axis. The signal output port serves to output the image signals generated by the first and second camera modules.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 13, 2018
    Inventors: Wei-Chuan Wang, Jing-Xia Pei, Huan Deng
  • Publication number: 20180227112
    Abstract: A bufferless ring network including at least two nodes and at least two timeslots, the at least two timeslots include a dedicated timeslot, and a first node in the bufferless ring network has use permission for the dedicated timeslot. The first node is configured to, in a state of having the use permission for the dedicated timeslot, detect whether all dedicated timeslots that pass through the first node are available, set a permission switch signal, and cancel the use permission for the dedicated timeslot according to the permission switch signal after detecting that all the dedicated timeslots that pass through the first node are available. A remaining node in the bufferless ring network is configured to obtain the use permission for the dedicated timeslot according to the permission switch signal. The remaining node is a node that needs to use the dedicated timeslot.
    Type: Application
    Filed: February 2, 2018
    Publication date: August 9, 2018
    Inventors: Qiaoshi Zheng, Zhirui Chen, Jing Xia
  • Publication number: 20180227146
    Abstract: A network-on-chip and a corresponding method are provided. The network-on-chip includes at least one bufferless ring network in at least one dimension of the network-on-chip. At least one bufferless ring network includes multiple routing nodes, and at least one of the multiple routing nodes is a switching node. Two bufferless ring networks in different dimensions may intersect. The two bufferless ring networks exchange data by using switching nodes. A dedicated slot and a public slot are configured in each bufferless ring network. Only one switching node has permission to use a dedicated slot at a same moment in each bufferless ring network, the permission to use the dedicated slot is transferred successively between switching nodes in each bufferless ring network. The permission to use the dedicated slot is transferred after transmission of data in the dedicated slot is completed.
    Type: Application
    Filed: February 7, 2018
    Publication date: August 9, 2018
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qiaoshi ZHENG, Zhirui CHEN, Jing XIA
  • Publication number: 20180205883
    Abstract: A camera module includes a first and a second photographing member, and a circuit substrate. The circuit substrate has a first lateral side and an opposite second lateral side, and a plurality of circuits. The first and the second photographing member is provided on the first and the second lateral side of the circuit substrate respectively and electrically connected to the circuit substrate. With these arrangements, the camera module can have overall reduced volume and is able to photographing a 360-degree panoramic image and lower the manufacturing cost.
    Type: Application
    Filed: January 15, 2017
    Publication date: July 19, 2018
    Inventors: Wei-Chuan Wang, Jing-Xia Pei, Huan Deng
  • Publication number: 20180019632
    Abstract: A wind power generator and stator iron core thereof, and stator iron core module; the iron core module (4) has an overall dimension consistent with a principle of the number of slots per pole per phase q=1; the iron core module (4) is provided with two three-phase winding units therein, an electrical angle formed by the two three-phase winding units is 30 degrees. The method of arranging winding in the stator iron core module (4) is changed to effectively reduce fifth and seventh winding harmonic magnetomotive forces.
    Type: Application
    Filed: November 17, 2015
    Publication date: January 18, 2018
    Inventors: Yazhou GAO, Jing XIA, Xiang ZHAO
  • Publication number: 20170272385
    Abstract: A chip is provided, where the chip is formed by packaging at least two dies, and the at least two dies form at least one die group. The die group includes a first die and a second die. A first processing unit and n groups of ports are disposed on the first die, and a second processing unit and m groups of ports are disposed on the second die. The first processing unit is configured to: switch at least one group of first type ports in the n groups of ports from input to output and switch a second type port that is in the m groups of ports and that is coupled to each group of the first type ports from output to input.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 21, 2017
    Inventors: Hengchao Xin, Han Lin, Jing Xia
  • Publication number: 20170262372
    Abstract: A cache memory system is provided. The cache memory system includes multiple upper level caches and a current level cache. Each upper level cache includes multiple cache lines. The current level cache includes an exclusive tag random access memory (Exclusive Tag RAM) and an inclusive tag random access memory (Inclusive Tag RAM). The Exclusive Tag RAM is configured to preferentially store an index address of a cache line that is in each upper level cache and whose status is unique dirty (UD). The Inclusive Tag RAM is configured to store an index address of a cache line that is in each upper level cache and whose status is unique clean (UC), shared clean (SC), or shared dirty (SD).
    Type: Application
    Filed: May 26, 2017
    Publication date: September 14, 2017
    Inventors: Zhenxi Tu, Jing Xia