Patents by Inventor Jochen Rivoir

Jochen Rivoir has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6735728
    Abstract: A testing unit for testing a data transfer and/or an addressing scheme in a bus-based system comprises a data generator for generating an expected data pattern and a comparator for comparing the expected data pattern with a data pattern received from a sending unit within the system. The data generator generates the expected data pattern in a defined relationship with the data generation of the data pattern received from the sending unit. Preferably, the defined relationship is an algorithmic relationship and can be based on the testing unit address.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: May 11, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Herbert Tiedemann, Tilmann Wendel, Jochen Rivoir
  • Patent number: 6732312
    Abstract: A method of compressing a test vector creates a compressed test vector for use in conjunction with automated test equipment (ATE). The method comprises generating a test vector having a sequence of elements, at least one element of which comprises a ‘don't care’ value. A random sequence of elements is produced also. The test vector and the random sequence are segmented. Each segment of the test vector is compared to a corresponding segment of the random sequence to determine whether the corresponding segments match. When a match is found, a first flag value is sequentially inserted into a compression test vector. When a mismatch is found, a second flag value is sequentially inserted into the compression vector as well as the elements of the mismatched test vector segment. The compressed test vector may be decompressed according to the invention directly into a completely specified test vector using the flag values.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: May 4, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Ajay Khoche, Jochen Rivoir
  • Publication number: 20040070529
    Abstract: A method and apparatus preconditions an analog signal and converts the preconditioned signal into a digital representation. The method comprises preconditioning the analog signal, generating a quantity N of reference signals, comparing an amplitude of the preconditioned signal to an amplitude of the reference signals to determine whether the preconditioned signal amplitude is greater than, less than or equal to reference signal amplitudes, and producing a timestamp at a time that the preconditioned signal and reference signal amplitudes are equal. The apparatus comprises a preconditioner, a reference signal generator and a quantity N of comparators. A comparator of the quantity N of comparators receives the preconditioned signal from the preconditioner, separately receives a reference signal, and produces a digital signal. The preconditioned signal or the analog signal may be reconstructed from the digital representation.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 15, 2004
    Inventors: Linda A. Kamas, Jochen Rivoir
  • Patent number: 6717540
    Abstract: A method and apparatus precondition an analog signal and convert the preconditioned signal into a digital representation. The method includes preconditioning the analog signal, generating a quantity N of reference signals, comparing an amplitude of the preconditioned signal to an amplitude of the reference signals to determine whether the preconditioned signal amplitude is greater than, less than or equal to reference signal amplitudes, and producing a timestamp at a time that the preconditioned signal and reference signal amplitudes are equal. The apparatus includes a preconditioner, a reference signal generator and a quantity N of comparators. A comparator of the quantity N of comparators receives the preconditioned signal from the preconditioner, separately receives a reference signal, and produces a digital signal. The preconditioned signal or the analog signal may be reconstructed from the digital representation.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: April 6, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Linda A Kamas, Jochen Rivoir
  • Publication number: 20040057541
    Abstract: The present invention relates to a method for adjusting transitions in a bit stream of a signal to be evaluated by comparison with a predetermined expected bit stream, comprising the steps of receiving said bit stream signal by a transition adjustment filter, providing a transition frame signal to said transition adjustment filter, said transition frame signal providing information for eliminating non-deterministic clock latencies within said bit stream of said received signal, and adjusting said bit stream of said received signal according to said transition frame signal resulting in an adjusted bit stream being in alignment to said expected bit stream.
    Type: Application
    Filed: May 28, 2003
    Publication date: March 25, 2004
    Applicant: Agilent Technologies, Inc.
    Inventor: Jochen Rivoir
  • Publication number: 20040022196
    Abstract: The present invention relates to a method for recovering a bit stream from a signal, comprising the steps of receiving said signal as a received bit stream of known first bit rate, over-sampling said received signal with a second bit rate, said second bit rate being n times higher than the first bit rate with n being at least three, said over-sampling resulting in an over-sampled bit stream wherein n bit segments following each other forming a bit segment frame and representing one bit of said received bit stream respectively, detecting signal transitions in said over-sampled bit stream, identifying first bit segments of said over-sampled bit stream in which no signal transitions occur, selecting one of said first bit segments of each bit segment frame respectively, extracting bit values from said selected first bit segments, and stringing together said extracted bit values as being said recovered bit stream
    Type: Application
    Filed: June 17, 2003
    Publication date: February 5, 2004
    Inventor: Jochen Rivoir
  • Publication number: 20030046623
    Abstract: An integrated circuit, including a configurable scan architecture used for an integrated circuit test procedure and quality control. The configurable scan chain architecture has the capability of being reconfigured to one of a variety scan chain architectures based on the constraints of the integrated circuit and the testing device. The present invention minimizes the integrated circuit test time by reconfiguring the scan architecture depending on certain constraints such as the latching frequency, the predetermined I/O frequency, the number of available integrated circuit I/O pins, the number of pins required for a proposed scan architecture, and the number of available pins on the testing device. The configurable scan architecture receives configuration signals which indicate which scan chain architecture should be configured on the integrated circuit that is being tested.
    Type: Application
    Filed: September 4, 2001
    Publication date: March 6, 2003
    Inventors: Ajay Khoche, Jochen Rivoir, David H. Armstrong
  • Publication number: 20020188888
    Abstract: A method and apparatus for testing a device using transition timestamp are used to evaluate output signals from the device. The method comprises the steps of performing timing tests on a signal from the device; and independently carrying out bit-level tests on a signal from the device. The independent timing tests and bit-level tests can be performed in parallel. The bit-level tests and apparatus comprise iteratively measuring a coarse timestamp for a transition in the signal and comparing the measured coarse timestamp to an expected timestamp to determine whether the device meets specifications. Whether the device meets specifications depends on whether, during the comparison step, the presence of a bit-level fault is detected. The apparatus and method may comprise Skew Fault detection, Bit Fault detection, No Coverage Warning detection and/or Drift Fault detection. An automatic testing system for testing devices comprises subsystems that incorporate the apparatus and method.
    Type: Application
    Filed: June 6, 2001
    Publication date: December 12, 2002
    Inventor: Jochen Rivoir
  • Patent number: 6489802
    Abstract: A transition splitting apparatus and method reduce a maximum transition rate of a digital signal. The apparatus and method are particularly useful for digital signal processing in communications and for performing digital transition timing testing on a device under test. The apparatus and method split a digital signal into two or more signals, while preserving the relative timing of transitions in the digital signal. A high frequency signal is partitioned by the apparatus and method into a plurality of equivalent lower frequency signals without loss of transition timing information. The apparatus is implemented with readily available components. The maximum transition rate of a digital signal is reduced by a factor of two or more, and is proportional to the number of output signals. A plurality of the apparatuses may be cascaded together into a system to achieve even greater reductions in maximum transition rates.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: December 3, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jochen Rivoir, Ajay Khoche
  • Publication number: 20020162066
    Abstract: A method of compressing a test vector creates a compressed test vector for use in conjunction with automated test equipment (ATE). The method comprises generating a test vector having a sequence of elements, at least one element of which comprises a ‘don't care’ value. A random sequence of elements is produced also. The test vector and the random sequence are segmented. Each segment of the test vector is compared to a corresponding segment of the random sequence to determine whether the corresponding segments match. When a match is found, a first flag value is sequentially inserted into a compression test vector. When a mismatch is found, a second flag value is sequentially inserted into the compression vector as well as the elements of the mismatched test vector segment. The compressed test vector may be decompressed according to the invention directly into a completely specified test vector using the flag values.
    Type: Application
    Filed: March 9, 2001
    Publication date: October 31, 2002
    Inventors: Ajay Khoche, Jochen Rivoir
  • Publication number: 20020145449
    Abstract: A transition splitting apparatus and method reduce a maximum transition rate of a digital signal. The apparatus and method are particularly useful for digital signal processing in communications and for performing digital transition timing testing on a device under test. The apparatus and method split a digital signal into two or more signals, while preserving the relative timing of transitions in the digital signal. A high frequency signal is partitioned by the apparatus and method into a plurality of equivalent lower frequency signals without loss of transition timing information. The apparatus is implemented with readily available components. The maximum transition rate of a digital signal is reduced by a factor of two or more, and is proportional to the number of output signals. A plurality of the apparatuses may be cascaded together into a system to achieve even greater reductions in maximum transition rates.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Inventors: Jochen Rivoir, Ajay Khoche
  • Patent number: 6462693
    Abstract: A method and apparatus converts an analog signal into a quantity N of digital signal representations. The method comprises the step of comparing an amplitude value in the analog signal to a quantity N of reference amplitude values to determine whether the analog value is greater than or less than a reference value, where N is an integer ≦1. The method further comprises the step of producing a logic level in a digital signal corresponding to the determination in the step of comparing. The method essentially converts the analog signal to a time representation and then converts the time representation to a digital representation. The apparatus comprises a quantity N of comparators each connected to receive the analog signal, separately to receive a different one of the N reference values, and to produce the digital signal. The analog signal is reconstructed from the digital representation.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: October 8, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Jochen Rivoir
  • Patent number: 6429799
    Abstract: A method and apparatus converts an analog signal into a digital representation. The method comprises the steps of generating a quantity N of time-varying reference signals, where N is an integer greater than or equal to one, comparing an amplitude of the analog signal to an amplitude of each of the reference signals to determine whether the analog signal amplitude is greater than, less than or equal to reference signal amplitudes, and producing a timestamp each time the analog signal and reference signal amplitudes are equal. The apparatus comprises a reference signal generator and a quantity N of comparators, each of the comparators being connected to receive the analog signal, separately to receive a different one of the reference signals, and to produce a digital signal. The analog signal may be reconstructed from the digital representation.
    Type: Grant
    Filed: July 14, 2001
    Date of Patent: August 6, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Linda Argon Kamas, Jochen Rivoir
  • Patent number: 6105087
    Abstract: A data-analyzing unit monitors and/or analyzes events on an information bus. The data-analyzing unit comprises an event recognition unit with one or more comparators coupled to the information bus and a sequencer state machine for determining sequential dependencies of events, whereby a state of the sequencer state machine depends on the history of information as provided thereto. The data-analyzing unit preferably comprises one or more counters coupled to the event recognition unit, thus allowing an analysis of data and/or events on the information bus. The data-analyzing unit may also comprise one or more memories coupled to the event recognition unit, thus providing a trace memory. In a preferred embodiment, the event recognition unit of the data-analyzing unit provides customized rules for monitoring defined event sequences of event behaviors thus allowing the monitoring of defined event sequences of event behaviors and possibly the drawing of conclusions therefrom e.g.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: August 15, 2000
    Assignee: Hewlett-Packard Company
    Inventor: Jochen Rivoir
  • Patent number: 6098186
    Abstract: Disclosed is the selecting of permutations of a plurality of parameters, each parameter comprising a plurality of parameter values, for applying the selected permutations as a permutation sequence to a device under test DUT. At first, a cycle size representing the number of parameter values in a parameter cycle to be repeated successively in the permutation sequence is defined for each parameter. The following criteria have to be met: a) the cycle sizes have to be different for all parameter cycles, b) each cycle size has to be equal or greater than the number of different parameter values of the respective parameter, and c) two cycle sizes must not have one or more factors in common. Each parameter cycle is provided with parameter values from that parameter according to the defined cycle size, and the parameter cycles can be repeated concurrently, preferably until a given termination criterion is reached all possible permutations have been selected.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: August 1, 2000
    Assignee: Hewlett-Packard Company
    Inventor: Jochen Rivoir