Abstract: The store of a computer configuration comprises a number of signalling bit locations. These locations are assigned to a peripheral apparatus or to a program stored in a store segment and indicate whether the peripheral apparatus or the program is accessible. For the modification of a signalling bit, a claim cycle is required which consists of successive read, modification, and write phases. In order to reduce the waiting time for other users during claims cycles, such cycles are always sub-divided into two parts, and if a claim cycle is being performed, this is indicated by the state of a claim flipflop. Further claim cycles are then blocked, but normal storage cycles remain permissible.