Abstract: An electronic device includes at least one trench capacitor that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence of at least two dielectric layers and at least two electrically conductive layers is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. A range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value.

Abstract: The present invention relates to an electronic device (300) comprising at least one trench capacitor (302) that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence (308) of at least two dielectric layers (312, 316) and at least two electrically conductive layers (314, 318) is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads (332, 334, 340) is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. By providing an individual internal contact pad for each of the electrically conductive layers, a range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value.

Abstract: A degree of contamination can be measured in a charged particle beam system by means of a contamination monitor which is provided with a carrier having an aperture for transmitting a charged particle beam and a membrane which is connected to the carrier and which covers the aperture. The thickness of a contamination layer deposited on the membrane can be determined by measurement of a decrease of the transmission of the membrane as the contamination increases. The accuracy of measurement is enhanced by selecting a central portion of the particle beam transmitted by the membrane.

Abstract: In a method of manufacturing a semiconductor device of the "semiconductor on insulator" type comprising at least one carrier body and a monocrystalline semiconductor body, in a major surface (2) of a monocrystalline semiconductor body (1) grooves (3) are provided having a predetermined depth. The surface provided with grooves is coated with a layer (4) of material resistant to polishing; and this layer is coated with a layer (5) of a chemomechanically polishable material having a layer thickness exceeding the groove depth, the latter layer (5) being polished to flatness and smoothness. The polished surface of the semiconductor body (1) is connected to a smooth flat major surface of a carrier body (6).

Abstract: The invention relates to a method of manufacturing a semiconductor device comprising a semiconductor body (1) having a buried insulating layer (7). Such a type of semiconductor device is known as a device of the SOI type. According to the invention, the starting material is a substrate (1) of monocrystalline semiconductor material with a top layer (2). Ions are implanted into a zone located under the top layer so that the zone becomes selectively etchable with respect to the remaining part of the substrate. The zone is then etched away, a cavity then being formed between the top layer (2) and the remaining part of the substrate (1). The cavity is filled at least in part with insulating material (7). By known techniques, semiconductor circuit elements can be provided in the top layer (2) thus disposed on the insulating layer (7).

Abstract: A method of providing narrow conductor tracks of metal silicide is provided. According to this technique, a pattern of polycrystalline silicon covered by a protective layer is converted along the edges into the silicide by covering the device with a metal. The edges are then silicidized laterally over a distance of 20 to 500 nm. The remaining silicon is selectively removed, and the tracks obtained can serve as conductor masks, such as, for example, a plate of a capacitor.

Abstract: Semiconductor devices, one having a planar bipolar high-voltage semiconductor circuit element comprising an island-shaped region of one conductivity type. On its lower side the island-shaped region is bounded by a first pn junction having a comparatively high breakdown voltage, and laterally by a second pn junction having a comparatively low breakdown voltage. The doping and the thickness of the island-shaped region are so small that the region is entirely depleted before breakdown occurs.The second semiconductor device having a field effect transistor of the lateral or vertical type with an island-shaped region having a contact region and bounded at the bottom by a pn junction having a comparatively high breakdown voltage and laterally by a second pn junction having a comparatively low breakdown voltage.