Patents by Inventor John K. Fogg

John K. Fogg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10511303
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: December 17, 2019
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Publication number: 20180331682
    Abstract: The present disclosure presents a circuit, method, and system for dynamically determining optimal deadtime values in a DC-DC converter power stage while operating the circuit under controlled conditions during a test/trim routine. The determined optimal deadtime values are stored in non-volatile memory. The optimal deadtime values are used as fixed settings during normal PWM operation. On start-up, the optimal, fixed deadtime values are loaded into the deadtime circuits of the driver and used during normal PWM operation of the DC-DC converter power stage circuit.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventors: Bogdan M. Duduman, John K. Fogg
  • Publication number: 20180041203
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Application
    Filed: September 26, 2017
    Publication date: February 8, 2018
    Inventors: Bogdan M. Duduman, Anthony G.P. Marini, William R. Richards, JR., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Patent number: 9774322
    Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: September 26, 2017
    Assignee: Sarda Technologies, Inc.
    Inventors: Bogdan M. Duduman, Anthony G. P. Marini, William R. Richards, Jr., William E. Batchelor, Greg J. Miller, John K. Fogg
  • Patent number: 5870266
    Abstract: A method and control circuit for an electronic switch, and more particularly the high side switch in a bridge circuit. Control is established by continuous and/or the combination of continuous and pulsed signals. Fail safe undervoltage protection is provided for the high side switch based on the adequacy of both high side and low side control voltages.
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: February 9, 1999
    Assignee: Harris Corporation
    Inventor: John K. Fogg
  • Patent number: 5805020
    Abstract: Start up noise in a class D amplifier--is corrected by adding an analog switch S1 to the integrator circuit A1. A resistor R3 in the feedback path of A1 prevents A1 from saturating. In an alternate embodiment silent start switch connects a variable resistance to the comparator input. The resistance gradually increases.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: September 8, 1998
    Assignee: Harris Corporation
    Inventors: George Edward Danz, Larry A. King, John K. Fogg
  • Patent number: 5767740
    Abstract: A dual comparator pwm audio amplifier has a differential-to-single ended feedback amplifier 40 coupled to an integrating amplifier 42 to provide more precise feedback control for the comparators 12, 16.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: June 16, 1998
    Assignee: Harris Corporation
    Inventor: John K. Fogg
  • Patent number: 5610503
    Abstract: A dc-to-dc converter circuit for generating an output voltage from a source voltage includes a plurality of first metal oxide semiconductor field effect transistors (MOSFETs) connected in parallel and collectively defining a gate, a source and a drain. A driver circuit preferably includes a bipolar transistor connected to the gate for turning on the first MOSFETs. A second MOSFET is preferably connected to the gate for turning off the plurality of first MOSFETs. The dc-to-dc converter also preferably includes a clamp circuit connected to the plurality of first MOSFETs across the drain and source thereof. Protection, soft-start and status features are also preferably incorporated into the dc-to-dc converter. A voltage divider is connected to a reference voltage for dividing a first reference voltage to thereby generate a second reference voltage less than a desired output voltage.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: March 11, 1997
    Assignee: Celestica, Inc.
    Inventors: John K. Fogg, Wayne Utter, George Dohanich