Abstract: An electron source having a rapid response time comprises at least one n-p-n structure (and possibly an array of said n-p-n structure) formed in a silicon or other semiconductor body (10) by a p-type first region (1) between n-type second and third regions (2 and 3). Electrons (24) are generated in the n-p-n structure (2,1,3) for emission into free space (20) from a surface area (4) of the body (10) after flowing from the second region (2) through the first and third regions (1 and 3). The n-p-n structure (2,1,3) has electrode connections (12 and 13) only to the n-type second and third regions (2 and 3).

Abstract: An electron source having good electron emission efficiency comprises a silicon or other semiconductor body (10) having an n-type first region (3) which is separated from an n-type or p-type second region (2) by a barrier. The barrier may be a p-n junction between p-type region (2) and the n-type region (3), or it may be a p-type region (1) forming p-n junctions with the n-type regions (2 and 3). By means of electrode connections (13 and 12) to the first and second regions (3 and 2) a potential difference (V) is applied across the barrier so as to bias the first region (3) positive with respect to the second region (2) and thereby to establish a supply of hot electrons (24) injected from the second region (2) across the barrier into the first region (3). These hot electrons (24) are emitted into free space (20) from a surface area (4) of the body (10) which may have a caesium coating (14) to reduce the electron work function.

Abstract: A high-gain MESFET (i.e. a Schottky barrier FET) has a gate electrode present directly on a semiconductor body. A highly doped layer, which forms parts of the channel of the transistor, extends below the gate electrode between the source and drain regions respectively. A highly doped surface region of opposite conductivity type to the highly doped layer is present between the gate electrode and the highly doped layer. This surface region, which is so thin that it is fully depleted in the zero gate bias condition, raises the effective height of the Schottky barrier. The highly doped layer is so thin that it can support without breakdown an electric field greater than the critical field for avalanche breakdown of the semiconductor material for this layer. Thus, the doping concentration of the highly doped layer can be increased so that more charge can be depleted from it.

Abstract: A semiconductor timing device having a charge storage region, the charge state of which may be detected by field effect action, the charge storage region containing radioactive material which decays by emitting charged nuclear particles, so that the charge state of the charge storage region varies progressively with time.

Abstract: A charge coupled circuit arrangement uses a punch-through charge introduction effect to convert electromagnetic radiation into electrical signals. The invention is particularly, but not exclusively, adapted to convert electromagnetic radiation in the infra-red wavelength band into electrical signals. A charge coupled device using the punch-through charge introduction effect is also disclosed.

Abstract: A bulk channel charge coupled imaging device having selective wavelength sensitivity includes a semiconductor layer in which pattern information in the form of discrete packets of majority charge carriers is generated and transported. The semiconductor layer has a concentration of at least one doping impurity characteristic of its conductivity type and a concentration of at least one deep level impurity which provides centers for trapping majority charge carriers. The doping impurity concentration and the deep level impurity concentration are such that depletion regions can be formed extending through the thickness of the layer while avoiding breakdown only as a result of substantially all the deep level centers within the depletion regions being full of majority charge carriers characteristic of the conductivity type of the semiconductor layer.

Abstract: In a CCD introduction of charge with good linearity and low signal input noise sensitivity is obtained by the control of punch-through of a depletion region associated with an input storage site to a rectifying barrier bounding a region in the semiconductor body separated from the CCD channel and forming a source of charge carriers to be stored and transported. In one form the source of charge carriers is an opposite conductivity type substrate on which is present a region of the one conductivity type in which a surface channel CCD is present. In other forms, including both surface channel CCD's and buried channel CCD's, buried layers are employed as source regions.

Abstract: A majority charge carrier diode structure in which current flow between two regions of the same conductivity type is controlled by the number of compensating impurities implanted to form between the two regions a narrow, fully-depleted barrier region which presents a potential barrier to each region. The device can be used as a discrete diode or as part of a device e.g. the collector junction of a transistor.

Abstract: An improved high voltage Schottky barrier diode includes a semiconductor layer having two adjacent sublayers of the same type conductivity but different doping concentrations. A plurality of isolated discrete regions of a second type conductivity opposite to that of the first are provided along the boundary region between the sublayers and beneath the Schottky junction. The invention results in an improved high voltage Schottky diode in which the reverse characteristics are substantially enhanced.