Patents by Inventor John Martin Shannon

John Martin Shannon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11939321
    Abstract: The invention provides a compound of formula (0): or a pharmaceutically acceptable salt, N-oxide or tautomer thereof; wherein: n is 1 or 2; X is CH or N; Y is selected from CH and C—F; Z is selected from C—Rz and N; R1 is selected from: -(Alk1)t-Cyc1; wherein t is 0 or 1; Optionally substituted C1-6 acyclic hydrocarbon groups R2 is selected from hydrogen; halogen; and C1-3 hydrocarbon groups optionally substituted with one or more fluorine atoms; R3 is hydrogen or a group L1-R7; R4 is selected from hydrogen; methoxy; and optionally substituted C1-3 alkyl; and R4a is selected from hydrogen and a C1-3 alkyl group; wherein Rz, Alk1, Cyc1, L1 and R7 are defined herein; provided that the compound is other than 6-benzyl-3-{2-[(2-methylpyrimidin-4-yl)amino]pyridin-4-yl}-7,8-dihydro-1,6-naphthyridin-5(6H)-one and 3-{2-[(2-methylpyrimidin-4-yl)amino]pyridin-4-yl}-7,8-dihydro-1,6-naphthyridin-5(6H)-one and salts and tautomers thereof.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: March 26, 2024
    Assignee: OTSUKA PHARMACEUTICAL CO., LTD.
    Inventors: Valerio Berdini, Ildiko Maria Buck, James Edward Harvey Day, Charlotte Mary Griffiths-Jones, Thomas Daniel Heightman, Steven Howard, Christopher William Murray, David Norton, Marc O'Reilly, Alison Jo-Anne Woolford, Michael Liam Cooke, David Cousin, Stuart Thomas Onions, Jonathan Martin Shannon, John Paul Watts
  • Patent number: 4045248
    Abstract: A semiconductor device comprising a semiconductor body portion having a shallow surface layer which is higher doped than the bulk of the semiconductor body portion, and a metal electrode on this layer and forming a Schottky barrier with the body portion. The layer serves to control the effective height of the barrier. The depth of the layer is such that the layer is substantially depleted of charge carriers in the zero bias condition whereby the slope of the reverse current-voltage characteristic of the barrier below break-down is determined by the doping of the bulk of the body portion substantially independently of the presence of the layer. Depending on the conductivity type of the layer relative to the bulk, the barrier can be higher or lower than that which would be formed in the absence of this layer. By providing the layer by implantation good control of the doping and hence of the barrier height can be obtained. Applicable to both discrete Schottky diodes and Schottky barriers in integrated circuits.
    Type: Grant
    Filed: July 25, 1975
    Date of Patent: August 30, 1977
    Assignee: U.S. Philips Corporation
    Inventors: John Martin Shannon, Julian Robert Anthony Beale
  • Patent number: 3947707
    Abstract: An electronic solid state device comprising a layer in which the electrical conductivity is controlled by a plurality of isolated discrete regions distributed within the bulk of the layer and forming potential barriers with semi conductor material of the layer surrounding the discrete regions. Electrical charge is stored in the layer by the discrete regions and the charging is obtained by the application of a potential pulse across the discrete regions. In a preferred operational mode the charging potential is applied such that current conduction paths in the layer are blocked by the depletion regions associated with the potential barrier for applied interrogation potentials across the regions of substantially smaller magnitude than the charging pulse. The device may consist of an imaging device having high charges gain and particular embodiments described consist of an image intensifier, an imaging active photocathode and a target plate of a vidicon camera tube.
    Type: Grant
    Filed: June 12, 1974
    Date of Patent: March 30, 1976
    Assignee: U.S. Philips Corporation
    Inventors: John Martin Shannon, John Ernest Ralph, Pieter Schagen
  • Patent number: 3943552
    Abstract: A semiconductor device comprising a semiconductor body portion having a shallow surface layer which is higher doped than the bulk of the semiconductor body portion, and a metal electrode on this layer and forming a Schottky barrier with the body portion. The layer serves to control the effective height of the barrier. The depth of the layer is such that the layer is substantially depleted of charge carriers in the zero bias condition whereby the slope of the reverse current-voltage characteristic of the barrier below break-down is determined by the doping of the bulk of the body portion substantially independently of the presence of the layer. Depending on the conductivity type of the layer relative to the bulk, the barrier can be higher or lower than that which would be formed in the absence of this layer. By providing the layer by implantation good control of the doping and hence of the barrier height can be obtained. Applicable to both discrete Schottky diodes and Schottky barriers in integrated circuits.
    Type: Grant
    Filed: June 18, 1974
    Date of Patent: March 9, 1976
    Assignee: U.S. Philips Corporation
    Inventors: John Martin Shannon, Julian Robert Anthony Beale
  • Patent number: 3931633
    Abstract: A semiconductor photocathode is described in which the electron emission is obtained from a P-type semiconductor into which free electrons are injected from the source or drain of an FET whose channel is normally blocked. Incident photons absorbed in the channel region unblock the FET causing electron emission. Preferably, the device comprises an imaging array of FET's and associated electron emitters.
    Type: Grant
    Filed: March 5, 1975
    Date of Patent: January 6, 1976
    Assignee: U.S. Philips Corporation
    Inventors: John Martin Shannon, John Ernest Ralph
  • Patent number: RE28704
    Abstract: A method for making an IGFET is described. The method utilizes impurity ion implantation into the surface channel to determine the conductivity thereof. The advantages include special impurity profiles providing improved performance, better control over important parameters such as threshold voltage, the manufacture of improved tetrodes, and the manufacture of improved ICs using for example N- and P-channel devices, and depletion and enhancement devices combined in a single chip.
    Type: Grant
    Filed: March 22, 1974
    Date of Patent: February 3, 1976
    Assignee: U.S. Philips Corporation
    Inventors: David Phythian Robinson, Julian Robert Anthony Beale, John Martin Shannon, John Anthony Kerr, Mukunda Behari Das