Patents by Inventor John McCormick

John McCormick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180206900
    Abstract: Provided herein are ablation systems having an ablation component with an ablation chamber and an insulation chamber, wherein the ablation chamber comprises a plurality of channels defined there. Other embodiments include ablation systems having a substrate source, a cooling component, and an ablation component. Certain systems are closed-loop systems that reuse the cooling substrate.
    Type: Application
    Filed: January 17, 2018
    Publication date: July 26, 2018
    Inventors: Jason Sperling, Benjamin Cameron, John McCormick, Patrick Magari, John VanScoy, Robert Hudgins, John Dockter
  • Patent number: 9747547
    Abstract: A nonlinear neuron classifier comprising a neuron array including a plurality of neuron chips each including a plurality of neurons of variable length and variable depth, the chips processing input vectors of variable length and variable depth that are input into the classifier for comparison against vectors stored in the classifier, wherein an NSP flag is set for a plurality of the neurons to indicate that only that plurality of neurons is to participate in the vector calculations. A virtual content addressable memory flag is set for certain of the neuron chips to enable functions including fast readout of data from the chips. Results of vector calculations are aggregated for fast readout for a host computer interfacing with the classifier.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: August 29, 2017
    Assignee: in2H2
    Inventors: Bruce Kent McCormick, William Harry Nagel, Christopher John McCormick, Mickey Lee Fandrich, Vardan Movsisyan, Matthew McCormick
  • Publication number: 20170177458
    Abstract: Methods and systems for monitoring the integrity of a graphics processing unit (GPU) are provided. The method comprises the steps of determining a known-good result associated with an operation of the GPU, and generating a test image comprising a test subject using the operation of the GPU, such that the test subject is associated with the known-good result. The test image is written to video memory, and the known-good result is written to system memory. Subsequently, the test subject from the test image is transfered from video memory to system memory. The test subject in the system memory is compared with the known-good result in system memory. If the test subject does not match the known-good result, then a conclusion is drawn that the integrity of the GPU has been compromised.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 22, 2017
    Inventors: Stephen Viggers, Tomislav Malnar, Sherwyn R. Ramkissoon, Gregory J. Szober, Aidan Fabius, Kenneth Wenger, John McCormick
  • Publication number: 20170154402
    Abstract: Methods, systems, and computer-readable media for monitoring a graphics processing unit (GPU) of a host computer system, including providing at least one test seed and at least one subsystem command to the GPU; receiving at least one test result from the GPU in response to providing the at least one test seed and at least one subsystem command to the GPU; and if the at least one test result does not correspond to at least one expected result, identifying the GPU as being in an undesired state. The subsystems to be tested may be a subset of all subsystems. The determination of subsystems to be tested may be determined in real-time, based on graphical application instructions. The subsystems to be tested may also be pre-determined.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 1, 2017
    Inventors: Stephen Viggers, Tomislav Malnar, Sherwyn R. Ramkissoon, Gregory J. Szober, Aidan Fabius, Kenneth Wenger, John Mccormick
  • Publication number: 20170116702
    Abstract: A system, method, and computer-readable medium are provided for translating OpenGL API calls to operations in a Vulkan graphics driver using an OpenGL-on-Vulkan driver architecture. An OpenGL-on-Vulkan driver receives an OpenGL context and render function, translates an OpenGL format to a Vulkan format, creates a Vulkan object and sets a Vulkan state, and generates a Vulkan command buffer corresponding to the OpenGL render function.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 27, 2017
    Inventors: Stephen Viggers, Tomislav Malnar, Sherwyn R. Ramkissoon, Gregory J. Szober, Aidan Fabius, Kenneth Wenger, John McCormick
  • Patent number: 9462690
    Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: October 4, 2016
    Inventors: Robert Francis Darveaux, David McCann, John McCormick, Louis W. Nicholls
  • Publication number: 20160155048
    Abstract: A nonlinear neuron classifier comprising a neuron array including a plurality of neuron chips each including a plurality of neurons of variable length and variable depth, the chips processing input vectors of variable length and variable depth that are input into the classifier for comparison against vectors stored in the classifier, wherein an NSP flag is set for a plurality of the neurons to indicate that only that plurality of neurons is to participate in the vector calculations. A virtual content addressable memory flag is set for certain of the neuron chips to enable functions including fast readout of data from the chips. Results of vector calculations are aggregated for fast readout for a host computer interfacing with the classifier.
    Type: Application
    Filed: January 21, 2016
    Publication date: June 2, 2016
    Inventors: Bruce Kent McCormick, William Harry Nagel, Christopher John McCormick, Mickey Lee Fandrich, Vardan Movsisyan, Matthew McCormick
  • Patent number: 8786075
    Abstract: An electrical circuit and/or lid therefor that, among other things, efficiently accommodates devices of different respective heights, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 22, 2014
    Inventors: Jeffery Alan Miks, John McCormick
  • Patent number: 8590296
    Abstract: In various embodiments, dead space and associated coupling losses are reduced in energy storage and recovery systems employing compressed air.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 26, 2013
    Assignee: SustainX, Inc.
    Inventors: Troy O. McBride, Benjamin Bollinger, John McCormick, Benjamin Cameron
  • Patent number: 8536458
    Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: September 17, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Robert Francis Darveaux, David McCann, John McCormick, Louis W. Nicholls
  • Publication number: 20120210705
    Abstract: In various embodiments, dead space and associated coupling losses are reduced in energy storage and recovery systems employing compressed air.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Inventors: Troy O. McBride, Benjamin Bollinger, John McCormick, Benjamin Cameron
  • Patent number: 8191362
    Abstract: In various embodiments, dead space and associated coupling losses are reduced in energy storage and recovery systems employing compressed air via use of a compressed-gas reservoir for maintaining a connector between cylinder assemblies at an intermediate pressure, thereby reducing the volume of dead space in the connector and increasing efficiency of the energy storage and recovery.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: June 5, 2012
    Assignee: SustainX, Inc.
    Inventors: Troy O. McBride, Benjamin Bollinger, John McCormick, Benjamin Cameron
  • Publication number: 20110315255
    Abstract: In various embodiments, dead space and associated coupling losses are reduced in energy storage and recovery systems employing compressed air.
    Type: Application
    Filed: April 6, 2011
    Publication date: December 29, 2011
    Inventors: Troy O. McBride, Benjamin Bollinger, John McCormick, Benjamin Cameron, Alexander Bell, David Chmiel, Michael Neil Scott
  • Patent number: 8026734
    Abstract: A dual tip test probe assembly for use in both cantilever and vertical probe applications includes first and second elongated test probes, each having a body portion and a tip portion with a tip configured to make contact with a device under test. An electrically-insulating material is disposed between but not in contact with the body portions of the first and second elongated test probes to electrically isolate the first and second elongated test probes. The first and second elongated test probes are held in alignment with respect to each other so that the tip of the first elongated test probe is adjacent to and not in contact with the tip of the second elongated test probe for making simultaneous contact with the device under test. The dual tip test probe assembly provides a low inductance and a small, stable footprint for testing small and/or non-flat test points.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: September 27, 2011
    Assignee: SV Probe Pte. Ltd.
    Inventors: Son Ngoc Dang, John McCormick, Habib Kilicaslan
  • Publication number: 20110143320
    Abstract: A brake pedal simulator air gap filler system includes a brake pedal, a pedal feel simulator engaged by the brake pedal, a pedal push rod engaged by the brake pedal, a master cylinder/booster push rod spaced-apart from the pedal push rod, an air gap between the pedal push rod and the master cylinder/booster push rod, a master cylinder/booster engaged by the master cylinder/booster push rod and an air gap filling apparatus having an air gap filling head in adjacent proximity to the air gap and adapted to selectively engage and disengage the air gap.
    Type: Application
    Filed: July 29, 2010
    Publication date: June 16, 2011
    Inventors: John McCormick, Peter Francis Worrel, Daniel A. Gabor, Dale Scott Crombez, Clement Newman Sagan
  • Publication number: 20100327894
    Abstract: A dual tip test probe assembly for use in both cantilever and vertical probe applications includes first and second elongated test probes, each having a body portion and a tip portion with a tip configured to make contact with a device under test. An electrically-insulating material is disposed between but not in contact with the body portions of the first and second elongated test probes to electrically isolate the first and second elongated test probes. The first and second elongated test probes are held in alignment with respect to each other so that the tip of the first elongated test probe is adjacent to and not in contact with the tip of the second elongated test probe for making simultaneous contact with the device under test. The dual tip test probe assembly provides a low inductance and a small, stable footprint for testing small and/or non-flat test points.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 30, 2010
    Inventors: Son Ngoc Dang, John McCormick, Habib Kilicaslan
  • Publication number: 20100257852
    Abstract: A vacuum accumulator system includes a booster, a vacuum accumulator disposed in fluid communication with the booster and an engine disposed in fluid communication with the vacuum accumulator.
    Type: Application
    Filed: April 10, 2009
    Publication date: October 14, 2010
    Inventors: John McCormick, Gunnar Ross, Dale Scott Crombez
  • Publication number: 20100065617
    Abstract: A gift-wrapping envelope including: a face panel; a back panel integrally coupled with the face panel; an expandable side panel coupled to both the face and back panels; an enclosure panel integrally coupled to the face, back, or side panels and releasably couplable to one of the panels to which it is not integrally coupled; a nametag area; and a releasably couplable accessory area. The gift-wrapping envelope may include an audio label. The nametag panel may be erasably writable. The releasably couplable accessory area may include a release liner and/or a no-rip material. The expandable side panel may include accordion-type folds.
    Type: Application
    Filed: November 20, 2009
    Publication date: March 18, 2010
    Inventor: John McCormick
  • Publication number: 20070046441
    Abstract: A gift-wrapping envelope including: a face panel; a back panel integrally coupled with the face panel; an expandable side panel coupled to both the face and back panels; an enclosure panel integrally coupled to the face, back, or side panels and releasably couplable to one of the panels to which it is not integrally coupled; a nametag area; and a releasably couplable accessory area. The gift-wrapping envelope may include an audio label. The nametag panel may be erasably writable. The releasably couplable accessory area may include a release liner and/or a no-rip material. The expandable side panel may include accordion-type folds.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 1, 2007
    Inventor: John McCormick
  • Publication number: 20070036776
    Abstract: This invention relates to composition and methods of employing said composition for treating or preventing microbial associated infections and diseases. More particularly the present invention relates to bacterial proteins, peptides and amino acids which are by-products of bacteria, in particular Lactobacillus and more specifically Lactobacillus strains GR-1 and RC-14, in compositions that can treat and prevent microbial-associated infections and diseases, by altering, for example, down-regulating, virulence properties of pathogenic organisms.
    Type: Application
    Filed: February 28, 2006
    Publication date: February 15, 2007
    Inventors: Gregor Reid, Peter Cadieux, John McCormick, Estelle Devillard