Patents by Inventor John P. VanGilder

John P. VanGilder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5648956
    Abstract: A downward compatible full-duplex ethernet transceiver associated with either the hub or the remote node in an ethernet local area network (LAN) includes generator circuitry for generating a full-duplex-capability signal indicating its full-duplex capability for transmission over a link of the LAN and detector circuitry for detecting transmission of such a signal from the transceiver with which it is communicating across the link of the LAN. The detector circuitry responds to the full-duplex-capability signal by sending a full-duplex enable signal to an ethernet controller configured according to the present invention. An ethernet controller contains circuitry responsive to the full-duplex-enable signal to disable transmission deferral in response to a carrier-sense signal generated by the transceiver. The full-duplex-capability indicator portion may comprise an extra pulse following an Nth link-integrity pulse after a delay of from about 2 to about 7 microseconds.
    Type: Grant
    Filed: December 27, 1995
    Date of Patent: July 15, 1997
    Assignee: Seeq Technology, Incorporated
    Inventors: Namakkal S. Sambamurthy, Woo-Ping Lai, John P. VanGilder
  • Patent number: 5504738
    Abstract: A downward compatible full-duplex 10Base-T ethernet transceiver associated with both the hub or the remote node in an ethernet network includes generator circuitry for generating a full-duplex-capability signal indicating its full-duplex capability for transmission over the twisted pair link and detector circuitry for detecting transmission of such a signal from the transceiver with which it is communicating across the twisted pair link. The detector circuitry responds to the full-duplex-capability signal by sending a full-duplex enable signal to an ethernet controller configured according to the present invention. An ethernet controller contains circuitry responsive to the full-duplex-enable signal to disable transmission deferral in response to a carrier-sense signal generated by the transceiver. The full-duplex-capability indicator portion may comprise an extra pulse following an Nth link-integrity pulse after a delay of between about 2-7 .mu.sec.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: April 2, 1996
    Assignee: Seeq Technology Inc.
    Inventors: Namakkal S. Sambamurthy, Woo-Ping Lai, John P. VanGilder
  • Patent number: 5311114
    Abstract: A downward compatible full-duplex 10Base-T ethernet transceiver associated with either the hub or the remote node in an ethernet network includes generator circuitry for generating a full-duplex-capability signal indicating its full-duplex capability for transmission over the twisted pair link and detector circuitry for detecting transmission of such a signal from the transceiver with which it is communicating across the twisted pair link. The detector circuitry responds to the full-duplex-capability signal by sending a full-duplex enable signal to an ethernet controller configured according to the present invention. An ethernet controller contains circuitry responsive to the full-duplex-enable signal to disable transmission deferral in response to a carrier-sense signal generated by the transceiver. The full-duplex-capability indicator portion may comprise an extra pulse following an Nth link-integrity pulse after a delay of between about 2-7 .mu.sec.
    Type: Grant
    Filed: October 27, 1992
    Date of Patent: May 10, 1994
    Assignee: Seeq Technology, Incorporated
    Inventors: Namakkal S. Sambamurthy, Woo-Ping Lai, John P. VanGilder