Patents by Inventor John Pasiecznik, Jr.

John Pasiecznik, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7546146
    Abstract: A control system and method for controlling switching between and among multiple antennas in a diversity antenna system comprising a radio head unit associated with a radio receiver; two or more antennas, either located in separate antenna modules or co-located in the same antenna module; a switch circuit; and a single cable. Control signals for controlling switching are provided as changes in a DC power supply signal carried on the single cable. In the case of multiple antenna modules, the radio head unit and the antenna modules are connected by the single cable using a daisy-chain architecture.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: June 9, 2009
    Assignee: GM Global Technology Operations, Inc.
    Inventors: Daniel F. Sievenpiper, Hui-Pin Hsu, Timothy J. Talty, John Pasiecznik, Jr.
  • Patent number: 7151350
    Abstract: A non-contact detection system and method for detecting obstructions in relation to a powered door on a vehicle such that contact with the door may be prevented. The detection system includes an object detection sensor located on the powered door for sensing an object within an adjustable sensing zone. A door position sensor senses position of the door relative to at least one of an open and closed door position. A controller adjusts the sensing zone of the object detection sensor as a function of the sensed door position.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: December 19, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Ronald Helmut Haag, Jeremy M Husic, John Pasiecznik, Jr.
  • Patent number: 6777958
    Abstract: A method for detecting a change in capacitance of a capacitive sensing element having a nominal capacitance value is disclosed. In an exemplary embodiment, the method includes coupling the sensing element to a first oscillator, the first oscillator generating a first frequency dependent upon the capacitance value of the sensing element. The first frequency is compared to a reference frequency generated by a second oscillator. The change in capacitance from the nominal capacitance value is detected if the first frequency differs from said reference frequency by a determined frequency value.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: August 17, 2004
    Assignees: Delphi Technologies, Inc., Hughes Aircraft Company
    Inventors: Ronald Helmut Haag, John Pasiecznik, Jr.
  • Patent number: 6750624
    Abstract: A non-contact obstacle detection system utilizing ultra sensitive capacitive techniques. In an exemplary embodiment, the system includes a sensing element disposed in proximity to a moveable panel and a proximity detection circuit in communication with the sensing element. The proximity detection circuit generates a differential output signal reflective of whether a foreign object is in proximity to the sensing element. In addition, a central control module is in communication with the sensing element. The central control module determines whether the differential output signal is reflective of a foreign object in proximity to the sensing element. If the central control module determines that the differential output signal is reflective of a foreign object in proximity to the sensing element, and the moveable panel is moving toward a closed position, then the central control module generates a control output signal to stop the moveable panel from moving toward the closed position.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: June 15, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Ronald Helmut Haag, Brian Deplae, Jeremy M. Husic, John Pasiecznik, Jr.
  • Patent number: 6723933
    Abstract: A flexible, capacitive strip for use in a non-contact obstacle detection system is disclosed. In an exemplary embodiment, the strip includes an elongated body for flexible mounting to a panel along a bottom surface of the elongated body. A first elongated planar conductor is contained within an upper section of the elongated body, and a longitudinal cavity is formed through a central portion of the elongated body, the longitudinal cavity being disposed between the planar conductor and the bottom surface. The first elongated planar conductor forms a first electrode of a sensing capacitor and the longitudinal cavity defines a portion of a dielectric material of the sensing capacitor.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: April 20, 2004
    Inventors: Ronald Helmut Haag, Brian Deplae, Jeremy M. Husic, John Pasiecznik, Jr.
  • Patent number: 6700393
    Abstract: A capacitive sensor assembly is disclosed. In an exemplary embodiment, the assembly includes a capacitive strip having an elongated body for flexible mounting to a panel along a bottom surface of the elongated body. A first elongated planar conductor is contained within an upper section of the elongated body, while a longitudinal cavity is formed through a central portion of the elongated body. The longitudinal cavity is disposed between the planar conductor and the bottom surface. A capacitance detector module is inserted within the longitudinal cavity, the capacitance detector module including a capacitance detector circuit therein that is coupled to the first elongated planar conductor.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: March 2, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Ronald Helmut Haag, Brian Deplae, Jeremy M. Husic, John Pasiecznik, Jr.
  • Patent number: 5872459
    Abstract: A membrane probe (10, 12, 14, 16, 58, 144) for testing integrated circuits (56,138) while still on the wafer upon which they are manufactured includes a flexible visually clear and self planarizing membrane (26) having circuit traces (20) and ground shielding planes (14), terminating resistor (152) and active buffer chips (172) formed thereon. Probe contact pads (36,38) electroplated on areas of the traces, and connector pads (32) plated on the membrane facilitate rapid detachable connection to a test fixture (50). The probe has a configuration, dimension and structure like that of the wafer itself so that automated pick and place equipment (136,142) employed for handling the wafers (138) may also be used to handle the probes (144). An unique test fixture (50) is adapted to receive and detachably secure a selected probe to the fixture.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: February 16, 1999
    Assignee: Hughes Aircraft Company
    Inventor: John Pasiecznik, Jr.
  • Patent number: 5642054
    Abstract: A membrane probe (10) for simultaneously testing two or more alternate columns or rows of integrated circuit chips (14) on the processing wafer (12) includes a flexible transparent and self planarizing membrane (22). The membrane includes circuit traces (26) and is carried by a substrate (16) defining parallel ports (18) corresponding to alternate columns or rows of circuit chips (14). Active test circuitry units (48) are mounted on the substrate (16) to perform test functions close to the site of testing. Two probes (10,110) are employed for testing each full wafer. One membrane probe (10) contains ports (18) and membrane segments (22) corresponding to one set of chips on the processing wafer, while the other probe (110) containing ports (18) and membrane segments (22) for the other interlaced set of chips on the wafer. Contact pads (34) are provided on areas of the membrane traces (26) to be visually registered through the membrane with contact pads of the chips under test.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: June 24, 1997
    Assignee: Hughes Aircraft Company
    Inventor: John Pasiecznik, Jr.
  • Patent number: 5623214
    Abstract: A membrane probe (10) for simultaneously testing two or more columns or rows of integrated circuits (37) while still on the wafer (56) upon which they are manufactured includes a flexible visually clear and self planarizing membrane (18) having circuit traces (22). A substrate (12) on which the membrane (18) is mounted features parallel ports (14) corresponding to alternate columns or rows of circuit chips (37) on the wafer to be tested. Two such substrates (12,112) thus forming two alternately used probe test heads (10,110) are employed for testing each full wafer, one test head (10) containing ports (14) corresponding to one set of alternate wafer columns or rows, the other test head (110) containing ports (114) corresponding to the remaining interlaced wafer columns or rows. Probe contact pads (30) are electroplated on areas of the traces (22) so that the contact pads (30) are visually registrable through the substrate ports.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: April 22, 1997
    Assignee: Hughes Aircraft Company
    Inventor: John Pasiecznik, Jr.
  • Patent number: 5600256
    Abstract: A flexible membrane (12) of an integrated circuit chip test probe is provided with raised contact features (14) on one side arranged in the pattern of contact pads of the chip to be tested. During manufacture, the membrane, in the area of its raised contact features, is specifically shaped by applying a vacuum to the outside of the membrane and casting a solid resilient elastomer (26) in place on the other side of the membrane to act as a shape retaining solid backup and to provide an anti-drape (226) shaped membrane (212) or to ensure planarity (326) of the ends of the membrane contact features (314). The vacuum may be used to pull the membrane and its contacts against a shape defining mandrel (60, 260, 360) while the elastomer is cast into place.
    Type: Grant
    Filed: February 13, 1995
    Date of Patent: February 4, 1997
    Assignee: Hughes Electronics
    Inventors: Blake F. Woith, John Pasiecznik, Jr., William R. Crumly, Robert K. Betz
  • Patent number: 5412866
    Abstract: A flexible membrane (12) of an integrated circuit chip test probe is provided with raised contact features (14) on one side arranged in the pattern of contact pads of the chip to be tested. During manufacture, the membrane, in the area of its raised contact features, is specifically shaped by applying a vacuum to the outside of the membrane and casting a solid resilient elastomer (26) in place on the other side of the membrane to act as a shape retaining solid backup and to provide an anti-drape (226) shaped membrane (212) or to ensure planarity (326) of the ends of the membrane contact features (314). The vacuum may be used to pull the membrane and its contacts against a shape defining mandrel (60,260,360) while the elastomer is cast into place.
    Type: Grant
    Filed: July 1, 1993
    Date of Patent: May 9, 1995
    Assignee: Hughes Aircraft Company
    Inventors: Blake F. Woith, John Pasiecznik, Jr., William R. Crumly, Robert K. Betz
  • Patent number: 5313157
    Abstract: A membrane probe (10, 12, 14, 16, 58, 144) for testing integrated circuits (56,138) while still on the wafer upon which they are manufactured includes a flexible visually clear and self planarizing membrane (26) having circuit traces (20) and ground shielding planes (14), terminating resistor (152) and active buffer chips (172) formed thereon. Probe contact pads (36,38) electroplated on areas of the traces, and connector pads (32) plated on the membrane facilitate rapid detachable connection to a test fixture (50). The probe has a configuration, dimension and structure like that of the wafer itself so that automated pick and place equipment (136,142) employed for handling the wafers (138) may also be used to handle the probes (144). An unique test fixture (50) is adapted to receive and detachably secure a selected probe to the fixture.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: May 17, 1994
    Assignee: Hughes Aircraft Company
    Inventor: John Pasiecznik, Jr.
  • Patent number: 5148103
    Abstract: A membrane probe (10, 12, 14, 16, 58, 144) for testing integrated circuits (56,138) while still on the wafer upon which they are manufactured includes a flexible visually clear and self planarizing membrane (26) having circuit traces (20) and ground shielding planes (14), terminating resistor (152) and active buffer chips (172) formed thereon. Probe contact pads (36,38) electroplated on areas of the traces, and connector pads (32) plated on the membrane facilitate rapid detachable connection to a test fixture (50). The probe has a configuration, dimension and structure like that of the wafer itself so that automated pick and place equipment (136, 142) employed for handling the wafers (138) may also be used to handle the probes (144). An unique test fixture (50) is adapted to receive and detachably secure a selected probe to the fixture.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: September 15, 1992
    Assignee: Hughes Aircraft Company
    Inventor: John Pasiecznik, Jr.
  • Patent number: 4803644
    Abstract: A hardware system is disclosed for detecting alignment marks on a substrate in connection with electron beam lithography. The system is considerably faster than prior software approaches. A scanning signal derived from backscattered electrons as the beam scans the substrate is stored and updated in a set of shift registers as scanning proceeds. The signals in the scanning shift registers are compared with a predetermined reference signal, corresponding to the expected scanning signal when the beam traverses an edge of an alignment mark, stored in another set of shift registers. A correlation is obtained between the scanning and reference signals by multiplying the values of the corresponding cells in the scanning and reference registers, and accumulating and weighting the result. The locations of the maximum positive and negative correlations, and hence the locations of the opposed edges of the alignment mark, are obtained by means of a timing mechanism coordinated with the scanning.
    Type: Grant
    Filed: September 20, 1985
    Date of Patent: February 7, 1989
    Assignee: Hughes Aircraft Company
    Inventors: James F. Frazier, Oberdan W. Otto, John Pasiecznik, Jr.