Patents by Inventor John T. Johnston

John T. Johnston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6356554
    Abstract: Systems and methods by which voice/data communications may occur in multiple modes/protocols are disclosed. In particular, systems and methods are provided for multiple native mode/protocol voice and data transmissions and receptions with a computing system having a multi-bus structures including, for example, a TDM bus and a packet bus, and multi-protocol framing engines. Such systems preferably include subsystem functions such as PBX, voice mail and other telephony functions, LAN hub and data router. In preferred embodiments, a TDM bus and a packet bus are intelligently bridged and managed, thereby enabling such multiple mode/protocol voice and data transmissions to be intelligently managed and controlled with a single, integrated system. A computer or other processor includes a local area network controller, which provides routing and hub(s) for one or more packet networks. The computer also is coupled to a buffer/framer, which serves to frame/deframe data to/from the computer from TDM bus.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: March 12, 2002
    Assignee: Vertical Networks, Inc.
    Inventors: Scott K. Pickett, John T. Johnston, Edward T. Nelson
  • Patent number: 5678787
    Abstract: There is described a vehicle door assembly with shear layer control for controlling the airflow in and around an aperture in the vehicle fuselage. The vehicle door assembly consists of an upper door and a lower door, both slidably mounted to the exterior surface of the vehicle fuselage. In addition, an inner door is slidably mounted beneath the upper door. Beneath the inner door is an aperture assembly having an aperture opening positionable to be substantially flush with the exterior surface of the vehicle fuselage. Also provided are means for positioning the aperture assembly in an upward and downward direction in relation to the vehicle fuselage.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: October 21, 1997
    Assignee: E-Systems, Inc.
    Inventors: William C. Kahn, John T. Johnston, Kyle G. Fluegel
  • Patent number: 5520358
    Abstract: There is described a vehicle door assembly with shear layer control for controlling the airflow in and around an aperture in the vehicle fuselage. The vehicle door assembly consists of an upper door and a lower door, both slidably mounted to the exterior surface of the vehicle fuselage. In addition, an inner door is slidably mounted beneath the upper door. Beneath the inner door is an aperture assembly having an aperture opening positionable to be substantially flush with the exterior surface of the vehicle fuselage. Also provided are means for positioning the aperture assembly in an upward and downward direction in relation to the vehicle fuselage.
    Type: Grant
    Filed: August 18, 1994
    Date of Patent: May 28, 1996
    Assignee: E-Systems, Inc.
    Inventors: William C. Kahn, John T. Johnston, Kyle G. Fluegel
  • Patent number: 5349684
    Abstract: A speed and memory control system and method for use with a sort accelerator having a rebound sorter. The speed and memory control system includes a variable length shift register which utilizes circulating RAM indexing, tag extraction lookahead features to speed up access of records, and merge lookahead and memory management features to provide quick and effective storage of records.
    Type: Grant
    Filed: July 22, 1992
    Date of Patent: September 20, 1994
    Assignees: Digital Equipment Corporation, National Semiconductor Corporation
    Inventors: Brian C. Edem, Richard P. Helliwell, John T. Johnston, Richard F. Lary
  • Patent number: 5319651
    Abstract: A data integrity checking system and method for use with a sort accelerator having a rebound sorter as a merger. The data integrity checking system checks the integrity of data which has been processed by a sorting system wherein unsorted data has been received from and sorted data has been delivered to a host processor. Parity valves and checksum schemes are used. Sorted data is also checked for proper sorting by a sort order checker.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: June 7, 1994
    Assignees: Digital Equipment Corporation, National Semiconductor Corporation
    Inventors: Brian C. Edem, Richard P. Helliwell, John T. Johnston, Richard F. Lary
  • Patent number: 5206947
    Abstract: A stable sorting system and method for use with a sort accelerator having a rebound sorter as a merger is disclosed. The stable sorting system maintains an output order of records which have equal keys. This output order is the same order of those records as they entered the rebound sorter. Stable sorting is maintained in both the sorting and the merging operations of the sort accelerator. An additional byte is inserted between the key and the data of a record to preserve record order for records having equal keys.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: April 27, 1993
    Assignees: Digital Equipment Corporation, National Semiconductor Corporation
    Inventors: Brian C. Edem, Richard P. Helliwell, John T. Johnston
  • Patent number: 5111465
    Abstract: A data integrity checking system and method for use with a sort accelerator having a rebound sorter as a merger. The data integrity checking system checks the integrity of data which has been processed by a sorting system wherein unsorted data has been received from and sorted data has been delivered to a host processor. Parity valves and checksum schemes are used. Sorted data is also checked for proper sorting by a sort order checker.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: May 5, 1992
    Assignee: Digital Equipment Corporation
    Inventors: Brian C. Edem, Richard P. Helliwell, John T. Johnston, Richard F. Lary
  • Patent number: 4302745
    Abstract: An overload warning system for fighter type aircraft combines analytical techniques of computing structural loads with flight conditions and aircraft control inputs to calculate the allowable load factor/control input on a real time basis. The flight conditions and aircraft control inputs are monitored by a microprocessor, which continuously monitors actual load factor, compares the answers with a computed allowable value and generates an output signal whenever a prescribed value is exceeded. This signal is available for transmission to aural or visual warning devices and for permanent recording.
    Type: Grant
    Filed: January 10, 1980
    Date of Patent: November 24, 1981
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: John T. Johnston, George W. Venorsky