Patents by Inventor Joji Ueno

Joji Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic random access memory with bit line equalizing means
    Patent number: 5444662
    Abstract: A dynamic random access memory of the complementary MOS transistor type has memory cells connected between complementary bit lines on one side of a pair of transfer gates and a sense amplifier connected to nodes on the other side of the transfer gates, so that the sense amplifier can be connected to the bit lines and memory cells through the pair of transfer gates. A sense amplifier equalizing circuit and a bit line equalizing circuit are provided on opposite sides of the transfer gates so that the potentials on the bit lines can be equalized independently of equalization of the potentials on the nodes. Accordingly, there is no delay in the equalization due to the transfer gates connecting the nodes to the bit lines.
    Type: Grant
    Filed: June 8, 1994
    Date of Patent: August 22, 1995
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Takayuki Tanaka, Yoshimasa Sekino, Yoshihiro Murashima, Yasuhiro Tokunaga, Joji Ueno, Takeru Yonaga