Patents by Inventor Jongseung Park

Jongseung Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8848776
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for equalizing a data signal.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: September 30, 2014
    Assignee: LSI Corporation
    Inventors: Bruce Wilson, George Mathew, Jongseung Park
  • Publication number: 20140286385
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for equalizing a data signal.
    Type: Application
    Filed: March 29, 2013
    Publication date: September 25, 2014
    Applicant: LSI Corporation
    Inventors: Bruce Wilson, George Mathew, Jongseung Park
  • Patent number: 8830613
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: September 9, 2014
    Assignee: LSI Corporation
    Inventors: Timothy B. Lund, Carl E. Forhan, Timothy W. Swatosh, Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park
  • Publication number: 20140233129
    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for adapting noise predictive filters for inter-track interference cancellation in a data processing system.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 21, 2014
    Applicant: LSI CORPORATION
    Inventors: Jun Xiao, Jongseung Park, Fan Zhang, Ivana Djurdjevic
  • Patent number: 8804260
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: August 12, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch, Ming Jin, Yuan Xing Lee
  • Patent number: 8773794
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: July 8, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch
  • Patent number: 8693119
    Abstract: Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: April 8, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Erich Franz Haratsch, Jongseung Park, Timothy B. Lund
  • Patent number: 8681439
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: March 25, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch, Ming Jin
  • Publication number: 20130223199
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel.
    Type: Application
    Filed: August 22, 2012
    Publication date: August 29, 2013
    Inventors: Timothy B. Lund, Carl E. Forhan, Timothy W. Swatosh, Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park
  • Patent number: 8423873
    Abstract: Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: April 16, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Shaohua Yang, Richard Leo Galbraith, Ksenija Lakovic, Yuan Xing Lee, Travis Oenning, Jongseung Park, Hideki Sawaguchi, Bruce A. Wilson
  • Publication number: 20130070362
    Abstract: Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track.
    Type: Application
    Filed: August 22, 2012
    Publication date: March 21, 2013
    Inventors: George Mathew, Erich Franz Haratsch, Jongseung Park, Timothy B. Lund
  • Publication number: 20130021689
    Abstract: Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel.
    Type: Application
    Filed: August 22, 2012
    Publication date: January 24, 2013
    Inventors: Erich Franz Haratsch, George Mathew, Ming Jin, Jongseung Park, Timothy W. Swatosh, Timothy B. Lund, Carl E. Forhan
  • Patent number: 8175201
    Abstract: Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: May 8, 2012
    Assignee: LSI Corporation
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, Liu Jingfeng, Jongseung Park
  • Publication number: 20120063023
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
    Type: Application
    Filed: July 19, 2011
    Publication date: March 15, 2012
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch
  • Publication number: 20120063024
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.
    Type: Application
    Filed: July 19, 2011
    Publication date: March 15, 2012
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch, Ming Jin
  • Publication number: 20120063022
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
    Type: Application
    Filed: July 19, 2011
    Publication date: March 15, 2012
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch, Ming Jin, Yuan Xing Lee
  • Patent number: 8046666
    Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: October 25, 2011
    Assignee: LSI Corporation
    Inventors: Jongseung Park, Andrei E. Vityaev, Li Du
  • Patent number: 7872823
    Abstract: Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 18, 2011
    Assignee: LSI Corporation
    Inventors: Jingfeng Liu, Hongwei Song, Jongseung Park, George Mathew, Yuan Xing Lee
  • Publication number: 20100287420
    Abstract: Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
    Type: Application
    Filed: October 27, 2008
    Publication date: November 11, 2010
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, Liu Jingfeng, Jongseung Park
  • Publication number: 20100235718
    Abstract: Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.
    Type: Application
    Filed: May 25, 2010
    Publication date: September 16, 2010
    Applicant: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Shaohua Yang, Richard Leo Galbraith, Ksenija Lakovic, Yuan Xing Lee, Travis Oenning, Jongseung Park, Hideki Sawaguchi, Bruce A. Wilson