Abstract: A method of controlling transmission power used for wireless transmission in a wireless communication device including calculating a remaining power level of a third period based on a tolerant power level of a first period and a remaining power level of a second period, the third period included in the first period and being a period from a current time to a point in time following the current time, the second period being a period from the current time to a point in time preceding the current time, calculating a transmission power level of the third period based on a target power level and the remaining power level of the third period, and generating a power control signal for determining a power level of a transmission signal unit based on the transmission power level of the third period may be provided.

Abstract: A method of processing a signal received over a wireless link may utilize sharing of Modulation and Coding Scheme (MCS) and Transport Block Size (TBS) data. At least one parameter is obtained including a sub-carrier spacing of a transport format. A modulation order and a transport block size may be detected, based on the at least one parameter. The signal received over the wireless link is then processed, based on the detected modulation order and the transport block size. An apparatus may perform the embodiments of the method to process the received signal.

Abstract: A wireless communication method of a wireless communication apparatus for supporting a plurality of radio access technologies (RATs) including receiving a first downlink signal corresponding to a first RAT and a second downlink signal corresponding to a second RAT from a base station through a first frequency band, decoding the first downlink signal, detecting the second downlink signal based on a result of decoding of the first downlink signal, and decoding the detected second downlink signal to acquire data included in the second downlink signal may be provided.

Abstract: Antenna tuning may include performing multiple sampling on a transmission signal applied to an antenna and a reception signal corresponding to the transmission signal during a period for which a first frequency is allocated to the transmission signal, such that sampling data are generated based on the multiple sampling, the sampling data including data corresponding to the transmission signal and data corresponding to the reception signal. The method may include calculating a parameter based on the sampling data, and tuning the antenna based on the parameter. A device may include a control circuit to perform the multiple sampling and set a tuning value, a radio frequency front-end to modulate the transmission signal based on the frequency and apply a return signal of the transmission signal or a reflection signal, and an antenna tuner to adjust a resonance frequency or an impedance of the antenna according to the tuning value.

Abstract: A chip for detecting a synchronization signal generated based on one of a plurality of sequences, which is generated by a sequence generator, the chip including a memory, and a processor connected to the memory may be provided. The processor may be configured to receive the synchronization signal, perform first descrambling the received synchronization signal for a first sequence from among the plurality of sequences by multiplying the received synchronization signal by the first sequence, and perform second descrambling the received synchronization signal for a second sequence, which is a complex conjugate of the first sequence, from among the plurality of sequences of the received synchronization signal by changing a sign of at least one element of a descrambled sequence of the first sequence.

Abstract: A method of controlling transmission power used for wireless transmission in a wireless communication device including calculating a remaining power level of a third period based on a tolerant power level of a first period and a remaining power level of a second period, the third period included in the first period and being a period from a current time to a point in time following the current time, the second period being a period from the current time to a point in time preceding the current time, calculating a transmission power level of the third period based on a target power level and the remaining power level of the third period, and generating a power control signal for determining a power level of a transmission signal unit based on the transmission power level of the third period may be provided.

Abstract: A circuit for processing Carrier Aggregation (CA) is provided. The circuit includes a plurality of Component Carrier (CC) processors, each CC processor configured to estimate a frequency offset for a related CC and to compensate the estimated frequency offset, a reference clock generator configured to generate a reference clock using a reference frequency offset as one of frequency offsets output from the plurality of CC processors, a plurality of reception Phase Lock Loop (PLL) units, each reception PLL unit configured to generate a reception carrier frequency for the related CC corresponding to the reference clock, and a plurality of transmission PLL units, each transmission PLL unit configured to generate a transmission carrier frequency for the related CC corresponding to the reference clock.

Abstract: Apparatuses, methods, and systems of measuring received power are described, including apparatuses, methods, and systems which can measure received power, even when the subcarrier offset of the measurement bandwidth is different from the subcarrier bandwidth of the cell bandwidth. In one method, the first received power of a plurality of Resource Blocks (RBs) received from a second Base Station (BS) are measured based on first channel state information received from a first BS. Based on the determination whether a value of an index included in the first channel state information is larger than a predetermined value, at least one of second received power, third received power, and fourth received power of the plurality of RBs is measured by using second channel state information including an alternative index determined based on the first channel state information based on a result of the determination.

Abstract: A circuit for processing Carrier Aggregation (CA) is provided. The circuit includes a plurality of Component Carrier (CC) processors, each CC processor configured to estimate a frequency offset for a related CC and to compensate the estimated frequency offset, a reference clock generator configured to generate a reference clock using a reference frequency offset as one of frequency offsets output from the plurality of CC processors, a plurality of reception Phase Lock Loop (PLL) units, each reception PLL unit configured to generate a reception carrier frequency for the related CC corresponding to the reference clock, and a plurality of transmission PLL units, each transmission PLL unit configured to generate a transmission carrier frequency for the related CC corresponding to the reference clock.

Abstract: A circuit for processing Carrier Aggregation (CA) is provided. The circuit includes a plurality of Component Carrier (CC) processors, each CC processor configured to estimate a frequency offset for a related CC and to compensate the estimated frequency offset, a reference clock generator configured to generate a reference clock using a reference frequency offset as one of frequency offsets output from the plurality of CC processors, a plurality of reception Phase Lock Loop (PLL) units, each reception PLL unit configured to generate a reception carrier frequency for the related CC corresponding to the reference clock, and a plurality of transmission PLL units, each transmission PLL unit configured to generate a transmission carrier frequency for the related CC corresponding to the reference clock.

Abstract: A circuit for processing Carrier Aggregation (CA) is provided. The circuit includes a plurality of Component Carrier (CC) processors, each CC processor configured to estimate a frequency offset for a related CC and to compensate the estimated frequency offset, a reference clock generator configured to generate a reference clock using a reference frequency offset as one of frequency offsets output from the plurality of CC processors, a plurality of reception Phase Lock Loop (PLL) units, each reception PLL unit configured to generate a reception carrier frequency for the related CC corresponding to the reference clock, and a plurality of transmission PLL units, each transmission PLL unit configured to generate a transmission carrier frequency for the related CC corresponding to the reference clock.

Abstract: An apparatus and method for mapping a cell IDentifier (ID) for cell searching in a transmitter of a wireless communication system are provided. The method includes generating a single type of complex sequences mapped with a cell ID, and transmitting the complex sequences mapped with the cell ID to synchronization channels periodically transmitted in each slot of a physical frame.

Abstract: A timing estimator of an OQPSK demodulator is provided. In the timing estimator, an A/D converter converts an analog reception signal into a digital reception signal. A differential circuit section delays the digital reception signal from the A/D converter by a preset time and obtains a phase difference between a conjugate complex number signal of the delayed digital reception signal and the digital reception signal to offset a frequency error contained in the digital reception signal. A correlation operation section performs a correlation operation between a reference symbol differentiated in the same way as a differentiation of the differential circuit section and the reception signal to obtain each correlation value. A coherent detector detects a coherent point on the basis of the correlation value from the correlation operation section.

Abstract: In a method of estimating a signal-to-interference ratio (SIR), a first average channel power per slot of a first channel that is under a fading environment is estimated. A second average channel power per slot of a second channel that is under a fading environment substantially the same as the first channel is estimated, wherein the first and second channels are multiplexed. A second signal power attenuation ratio of the second channel is calculated using the second average power per slot of the second channel. A third average power per slot of the first channel is calculated using the first average power per slot of the first channel and a reciprocal of the second signal power attenuation ratio of the second channel.

Abstract: The invention relates to a symbol detector for detecting symbols received in a receive modem of short-range wireless personal area network of a ZigBee system (IEEE 802.15.4). An OQPSK short-range wireless communication system according to the invention acquires frequency offset in a received signal using a symbol contained in a preamble of a packet of the signal, multi-delay-differentiates the signal by a plurality of predetermined delay times, and complex-conjugates the acquired frequency offset to eliminate the frequency offset. Then, the OQPSK short-range wireless communication system according to the invention correlates the received signal with a PN sequence delay-differentiated through the same process to detect the symbols corresponding to the received signal.

Abstract: A channel estimator, demodulator, speed estimator and method thereof. The speed estimator may generate a speed indicator indicating a speed of a mobile device. The channel estimator may perform channel estimation based on the estimated speed indicated by the speed indicator. The demodulator may perform channel compensation based on the channel estimation performed by the channel estimator.

Abstract: An apparatus and method for mapping a cell IDentifier (ID) for cell searching in a transmitter of a wireless communication system are provided. The method includes generating a single type of complex sequences mapped with a cell ID, and transmitting the complex sequences mapped with the cell ID to synchronization channels periodically transmitted in each slot of a physical frame.

Abstract: A timing estimator of an OQPSK demodulator is provided. In the timing estimator, an A/D converter converts an analog reception signal into a digital reception signal. A differential circuit section delays the digital reception signal from the A/D converter by a preset time and obtains a phase difference between a conjugate complex number signal of the delayed digital reception signal and the digital reception signal to offset a frequency error contained in the digital reception signal. A correlation operation section performs a correlation operation between a reference symbol differentiated in the same way as a differentiation of the differential circuit section and the reception signal to obtain each correlation value. A coherent detector detects a coherent point on the basis of the correlation value from the correlation operation section.

Abstract: The invention relates to a symbol detector for detecting symbols received in a receive modem of short-range wireless personal area network of a ZigBee system (IEEE 802.15.4). An OQPSK short-range wireless communication system according to the invention acquires frequency offset in a received signal using a symbol contained in a preamble of a packet of the signal, multi-delay-differentiates the signal by a plurality of predetermined delay times, and complex-conjugates the acquired frequency offset to eliminate the frequency offset. Then, the OQPSK short-range wireless communication system according to the invention correlates the received signal with a PN sequence delay-differentiated through the same process to detect the symbols corresponding to the received signal.

Abstract: In a method of estimating a signal-to-interference ratio (SIR), a first average channel power per slot of a first channel that is under a fading environment is estimated. A second average channel power per slot of a second channel that is under a fading environment substantially the same as the first channel is estimated, wherein the first and second channels are multiplexed. A second signal power attenuation ratio of the second channel is calculated using the second average power per slot of the second channel. A third average power per slot of the first channel is calculated using the first average power per slot of the first channel and a reciprocal of the second signal power attenuation ratio of the second channel.