Abstract: Disclosed herein are a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs preprocessing of feature map information, frame packing, frame classification, and encoding. A decoding apparatus performs decoding, frame depacking, and postprocessing in order to reconstruct feature map information. By encoding the feature map information, inter-prediction and intra-block prediction for a frame are performed. The encoding apparatus provides the decoding apparatus with a feature map information bitstream for reconstructing the feature map information along with an image information bitstream.

Abstract: Disclosed herein are a method and apparatus for compressing learning parameters for training of a deep-learning model and transmitting the compressed parameters in a distributed processing environment. Multiple electronic devices in the distributed processing system perform training of a neural network. By performing training, parameters are updated. The electronic device may share the updated parameter thereof with additional electronic devices. In order to efficiently share the parameter, the residual of the parameter is provided to the additional electronic devices. When the residual of the parameter is provided, the additional electronic devices update the parameter using the residual of the parameter.

Abstract: A cell balancing module according to an embodiment of the present invention comprises: a main board on which a plurality of cell balancing resistors are mounted; at least one sub-board on which a plurality of cell balancing resistors are mounted and which is formed above the main board while being spaced a predetermined distance apart therefrom; and at least one connector which supports the sub-board to be spaced apart from the main board and electrically connects the sub-board to the main board.

Abstract: A method of generating a cryptographic algorithm includes generating at least one key table on the basis of a seed value; generating, by using a round tweak bit string and an input bit string that is input to one of input branches of a Feistel structure, a first transformation function converting the input bit string into a first random bit string having a length that extends beyond a length of the input bit string, generating a second transformation function converting a second random bit string generated by referencing the one or more key tables into a third random bit string having a length that is the same as the length of the input bit string, and generating a block cryptographic algorithm of a Feistel structure which includes a round function to which the one or more key tables, the first transformation function, and the second transformation function are applied.

Abstract: A method of generating a cryptographic algorithm according to one embodiment of the present disclosure includes generating one or more key tables on the basis of a seed value; generating a first transformation function that converts an input bit string, which is input to one of input branches of a Feistel structure, into a first random bit string having a length that extends beyond a length of the input bit string; generating a second transformation function that converts a second random bit string generated by referencing the one or more key tables into a third random bit string having a length that is the same as the length of the input bit string; and generating a block cryptographic algorithm of a Feistel structure which includes a round function to which the one or more key tables, the first transformation function, and the second transformation function are applied.

Abstract: Disclosed herein is an encoding method. The encoding method includes generating multiple feature maps using an input image, transforming the feature maps using a transform vector, and generating a bitstream by performing entropy encoding on at least any one of the feature map, the transform coefficient of the feature map, or the transform vector, or a combination thereof.

Abstract: Disclosed are a coating composition for a composite positive electrode active material and a method of preparing a composite positive electrode active material using the same.

Abstract: Disclosed herein are a method, an apparatus and a storage medium for processing a feature map. An encoding method for a feature map includes configuring a feature frame for feature maps, and generating encoded information by performing encoding on the feature frame. A decoding method for a feature map includes reconstructing a feature frame by performing decoding on encoded information, and reconstructing feature maps using the feature frame. A feature frame is configured using feature maps, and compression using a video compression codec or a deep learning-based image compression method is applied to the feature frame.

Abstract: A memory system and an operating method thereof are disclosed. An operating method of a memory system including a nonvolatile memory device and a controller configured to control the nonvolatile memory device includes the controller updating original data of firmware stored in the nonvolatile memory device, the controller transmitting a notification signal, which notifies a host device of completion of the updating of the original data, to the host device when the updating of the original data is completed, and the controller updating backup data of the firmware stored in the nonvolatile memory device after the notification signal is transmitted.

Abstract: Disclosed herein are a video-decoding method and apparatus and a video encoding method and apparatus, and more particularly a method and an apparatus which perform region-differential image encoding/decoding using a recovered image. In accordance with an encoding method according to an embodiment, a recovered low-quality image is generated by performing encoding on an original image and a recovered high-quality image is generated using the recovered low-quality image. An image is segmented into multiple regions, and encoded reconstruction information for generating a reconstructed high-quality image is generated by performing encoding on the image.

Abstract: Disclosed herein are an apparatus and method for inferring a cyberattack path based on attention. The apparatus includes memory in which at least one program is recorded and a processor for executing the program. The program generates test data required for generating an intelligent attack graph and generates an attack graph based on an intelligent attack path prediction model.

Abstract: A method for operating a memory system including a memory device and a controller which controls the memory device includes identifying a target command among a plurality of commands queued in a host command queue; comparing an estimated power with a power limit; checking an estimated de-queuing time in the case where the estimated power is larger than or equal to the power limit; dequeuing the target command from the host command queue to a memory command queue in the case where the estimated de-queuing time is smaller than a predetermined threshold value; de-queueing the target command from the memory command queue to the memory device; and performing an operation corresponding to the target command.

Abstract: A method for encryption according to an embodiment includes generating a ciphertext for a secret key that is an integer vector by using an integer-based first homomorphic encryption algorithm, generating a key stream that is the integer vector from a nonce and the secret key by using a key stream generator, encoding the key stream by using a message encoding function of the first homomorphic encryption algorithm, encoding a message that is a real vector by using a message encoding function of a real number-based second homomorphic encryption algorithm, generating a ciphertext for the message by using a result of the encoding of the key stream and a result of the encoding of the message, and transmitting the nonce, the ciphertext for the secret key, and the ciphertext for the message to an apparatus for converting a ciphertext.

Abstract: A memory system includes: a memory device; a first queue suitable for queuing commands received from a host; a second queue suitable for enqueuing the commands from the first queue and dequeuing the commands to the memory device according to the FIFO scheme; and a processor suitable for: delaying enqueuing a read command into the second queue until the program operation is successfully performed when a logical address of a write command, in response to which a program operation is being performed, is the same as a logical address corresponding to the read command enqueued in the first queue; and determining whether or not to enqueue a subsequent read command, which is enqueued in the first queue after the read command, into the second queue.

Abstract: A memory system includes: a memory device; a command queue queuing a program descriptor and a first read descriptor, and sequentially outputting the descriptors; a program manager performing an error handling operation in response to the program descriptor, the error handling operation including performing a program operation on a second physical address when a program operation performed on a first physical address fails; a fail managing buffer storing the first physical address for the failed program operation; a queue manager deleting the first read descriptor from the command queue and outputting an exception signal, when a physical address of the first read descriptor is the same as the first physical address; and a descriptor generator generating a second read descriptor including the second physical address in response to the exception signal and enqueuing the second read descriptor in the command queue, when the error handling operation passed.

Abstract: A controller for controlling a nonvolatile memory device comprising: a read count table including a plurality of read count data, wherein each of the read count data includes a read count value for one data storage region; a read count address table including a read count address indicating an address of a memory region where the read count data is stored; a flash translation layer (FTL) configured to control an operation of the nonvolatile memory device, and manage the read count table and the read count address table; and a flash interface layer (FIL) configured to control data communication between the FTL and the nonvolatile memory device, and update the read count value based on the read count address when read operation is performed on the data storage region.

Abstract: Provided herein may be a storage device and a method of operating the storage device. A memory controller may include a storage area manager and a write operation controller. The storage area manager may allocate a plurality of memory devices to a first group and a second group in response to a storage area setting command. The write operation controller may control a group selected from the first group and the second group according to a type of a write request to store write data. At least one memory devices in the first group includes memory blocks storing n data bits. At least one memory devices in the second group includes memory blocks storing m data bits.

Abstract: A method according to one embodiment includes generating one or more key tables based on a first seed value; generating one or more secret values from a tweak value based on the one or more key tables; and performing encryption or decryption using the one or more secret values. An apparatus according to one embodiment includes a key table generator configured to generate one or more key tables based on a first seed value, a secret value generator configured to generate one or more secret values from a tweak value based on the one or more key tables, and an encryptor/decryptor configured to perform encryption or decryption using the one or more secret values.

Abstract: Disclosed are a printed circuit board connector according to an embodiment and a module device including same. The printed circuit board connector comprises: a substrate; holes formed in the substrate at predetermined intervals and coated with a metal material on the inner circumferential surface thereof so as to form a metal layer; a first metal pad formed at one end of the holes and connected to the metal layer; and a second metal pad formed at the other end of the holes and connected to the metal layer.

Abstract: A method for generating a key stream according to an embodiment includes generating r round keys that are each N-dimensional integer vectors including elements of an integer set defined based on a prime number t, based on a random bit string, an encryption counter, and a secret key that is an N-dimensional integer vector consisting of elements of the integer set , generating a first round output vector x1 by performing a modular addition operation on an initial vector and a first round key RK1 of the r round keys with the prime number t as a modulus, and generating a key stream that is an N-dimensional integer vector consisting of elements of the integer set from the first round output vector x1 by using a second to r-th round keys of the r round keys, and one or more first round functions and a second round function.