Patents by Inventor Jose P. Allarey

Jose P. Allarey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 9984038
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Intel Corporation
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan
  • Methods and apparatus to improve turbo performance for events handling
    Patent number: 9904346
    Abstract: Embodiments of an apparatus for improving performance for events handling are presented. In one embodiment, the apparatus includes a number of processing elements and task routing logic. If at least one of the processing elements is in a turbo mode, the task routing logic selects a processing element for executing a task based at least on a comparison of performance losses.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: February 27, 2018
    Assignee: Intel Corporation
    Inventors: Ryan D. Wells, Ohad Falik, Jose P. Allarey
  • Method, Apparatus, And System For Optimizing Frequency And Performance In A Multidie Microprocessor
    Publication number: 20160140081
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: January 27, 2016
    Publication date: May 19, 2016
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan
  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 9280172
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: March 8, 2016
    Assignee: Intel Corporation
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan
  • METHODS AND APPARATUS TO IMPROVE TURBO PERFORMANCE FOR EVENTS HANDLING
    Publication number: 20150253833
    Abstract: Embodiments of an apparatus for improving performance for events handling are presented. In one embodiment, the apparatus includes a number of processing elements and task routing logic. If at least one of the processing elements is in a turbo mode, the task routing logic selects a processing element for executing a task based at least on a comparison of performance losses.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Inventors: Ryan D. Wells, Ohad Falik, Jose P. Allarey
  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 8806248
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: August 12, 2014
    Assignee: Intel Corporation
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv
  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 8769323
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: Jose P. Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv
  • Technique for preserving cached information during a low power mode
    Patent number: 8732399
    Abstract: A technique to retain cached information during a low power mode, according to at least one embodiment. In one embodiment, information stored in a processor's local cache is saved to a shared cache before the processor is placed into a low power mode, such that other processors may access information from the shared cache instead of causing the low power mode processor to return from the low power mode to service an access to its local cache.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: May 20, 2014
    Assignee: Intel Corporation
    Inventors: Sanjeev Jahagirdar, Varghese George, Jose P. Allarey
  • METHOD, APPARATUS, AND SYSTEM FOR OPTIMIZING FREQUENCY AND PERFORMANCE IN A MULTIDIE MICROPROCESSOR
    Publication number: 20140108849
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: December 26, 2013
    Publication date: April 17, 2014
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan
  • METHOD, APPARATUS, AND SYSTEM FOR OPTIMIZING FREQUENCY AND PERFORMANCE IN A MULTIDIE MICROPROCESSOR
    Publication number: 20140032950
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Inventors: Jose P. Allarey, Varghese George, Sanjeev S. Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv
  • Dynamic power reduction
    Patent number: 8560869
    Abstract: Some embodiments of the invention include systems, apparatuses, and methods for dynamically reducing requested supply voltage based on idle functional blocks.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: October 15, 2013
    Assignee: Intel Corporation
    Inventor: Jose P. Allarey
  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 8560871
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: October 15, 2013
    Assignee: Intel Corporation
    Inventors: Jose P. Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Nathan Ofer, Tomer Ziv
  • Method, Apparatus, And System For Optimizing Frequency And Performance In A Multidie Microprocessor
    Publication number: 20130103928
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: December 11, 2012
    Publication date: April 25, 2013
    Inventors: Jose P. Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Nathan Ofer, Tomer Ziv
  • Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor
    Patent number: 8356197
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: January 15, 2013
    Assignee: Intel Corporation
    Inventors: Jose P Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Nathan J Ofer, Tomer Ziv
  • Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor
    Patent number: 8032772
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: October 4, 2011
    Assignee: Intel Corporation
    Inventors: Jose P Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Ofer J Nathan, Tomer Ziv
  • METHODS AND APPARATUS TO IMPROVE TURBO PERFORMANCE FOR EVENTS HANDLING
    Publication number: 20110238974
    Abstract: Embodiments of an apparatus for improving performance for events handling are presented. In one embodiment, the apparatus includes a number of processing elements and task routing logic. If at least one of the processing elements is in a turbo mode, the task routing logic selects a processing element for executing a task based at least on a comparison of performance losses.
    Type: Application
    Filed: June 8, 2011
    Publication date: September 29, 2011
    Inventors: Ryan D. Wells, Ohad Falik, Jose P. Allarey, Mary Jean Allarey
  • METHOD, APPARATUS, AND SYSTEM FOR OPTIMIZING FREQUENCY AND PERFORMANCE IN A MULTIDIE MICROPROCESSOR
    Publication number: 20110238973
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: June 8, 2011
    Publication date: September 29, 2011
    Inventors: Jose P. Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Nathan J. Ofer, Tomer Ziv
  • DYNAMIC POWER REDUCTION
    Publication number: 20110154081
    Abstract: Some embodiments of the invention include systems, apparatuses, and methods for dynamically reducing requested supply voltage based on idle functional blocks.
    Type: Application
    Filed: March 1, 2011
    Publication date: June 23, 2011
    Inventor: Jose P. Allarey
  • METHODS AND APPARATUSES TO IMPROVE TURBO PERFORMANCE FOR EVENTS HANDLING
    Publication number: 20110138388
    Abstract: Embodiments of an apparatus for improving performance for events handling are presented. In one embodiment, the apparatus includes a number of processing elements and task routing logic. If at least one of the processing elements is in a turbo mode, the task routing logic selects a processing element for executing a task based at least on a comparison of performance losses.
    Type: Application
    Filed: December 3, 2009
    Publication date: June 9, 2011
    Inventors: Ryan D. Wells, Ohad Falik, Jose P. Allarey, Mary Jean Allarey
  • Dynamic power reduction
    Patent number: 7900069
    Abstract: Some embodiments of the invention include systems, apparatuses, and methods for dynamically reducing requested supply voltage based on idle functional blocks.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: March 1, 2011
    Assignee: Intel Corporation
    Inventor: Jose P. Allarey