Abstract: Semiconductor device assemblies may include a carrier wafer and a thermoset adhesive on a surface of the carrier wafer. A metal barrier material may be located on the thermoset adhesive. A thermoplastic adhesive may be located on an opposite side of the metal barrier material from the thermoset adhesive. A device wafer may be located on an opposite side of the thermoplastic material from the metal barrier material. Semiconductor device processing systems may include a carrier wafer having a thermoset adhesive adhered to a surface thereof and a metal barrier material adhered to the thermoset adhesive opposite the carrier wafer. A laser apparatus may be located on an opposite side of the carrier wafer from the metal barrier material and positioned to aim a laser beam through the carrier wafer to impinge on the metal barrier material.

Abstract: Methods of detaching semiconductor device structures from carrier structures may involve directing a laser through a carrier structure comprising a semiconductor material to a barrier material located between the carrier structure and a semiconductor device structure adhere to an opposite side of the barrier material. A bond between the carrier structure and an adhesive material temporarily securing the carrier structure to the semiconductor device structure may be released in response to heating of the barrier material by the laser beam. The carrier structure may be removed from the semiconductor device structure, the barrier material removed, and an adhesive bonding the semiconductor device structure to the barrier material removed.

Abstract: Semiconductor device assemblies may include a carrier wafer and a thermoset adhesive on a surface of the carrier wafer. A metal barrier material may be located on the thermoset adhesive. A thermoplastic adhesive may be located on an opposite side of the metal barrier material from the thermoset adhesive. A device wafer may be located on an opposite side of the thermoplastic material from the metal barrier material. Semiconductor device processing systems may include a carrier wafer having a thermoset adhesive adhered to a surface thereof and a metal barrier material adhered to the thermoset adhesive opposite the carrier wafer.

Abstract: Methods of detaching semiconductor device structures from carrier structures may involve directing a laser through a carrier structure comprising a semiconductor material to a barrier material located between the carrier structure and a semiconductor device structure adhere to an opposite side of the barrier material. A bond between the carrier structure and an adhesive material temporarily securing the carrier structure to the semiconductor device structure may be released in response to heating of the barrier material by the laser beam. The carrier structure may be removed from the semiconductor device structure, the barrier material removed, and an adhesive bonding the semiconductor device structure to the barrier material removed.

Abstract: A method and apparatus for encapsulating microelectronic devices. In one embodiment, the method includes removing a portion of encapsulating material that at least partially surrounds a microelectronic substrate by directing a source of laser radiation toward the encapsulating material. The method can further include exposing a surface of the microelectronic substrate, for example, to enhance a rate at which heat is transferred away from the microelectronic substrate. Alternatively, the encapsulating material can be removed to form heat transfer structures, such as pins or ribs, also to enhance a rate at which heat is transferred away from the microelectronic substrate. In still another embodiment, a portion of the encapsulating material or a support member to which the substrate is attached can be removed to define interlocking features that allow one microelectronic substrate package to be stacked on another and to resist relative movement between the two packages.

Abstract: Packaged microelectronic devices, methods for packaging microelectronic devices, and methods of operating microelectronic devices. In one embodiment, a packaged microelectronic device comprises a die including integrated circuitry, a first casing coating at least a portion of the die, a heat sink proximate to the die, and a second casing on at least a portion of the heat sink and coating at least a portion of the first casing. The first casing has a plurality of first interconnect elements, and the second casing engages the first interconnect elements to the first casing. The interconnect elements can be surface striations or other features that project into or away from the first casing. For example, the interconnect elements can be ridges extending across a surface of the first casing. In other embodiments, the first interconnect elements can be bumps and/or dimples across the surface of the first casing.

Abstract: A method and apparatus for encapsulating microelectronic devices. In one embodiment, the method includes removing a portion of encapsulating material that at least partially surrounds a microelectronic substrate by directing a source of laser radiation toward the encapsulating material. The method can further include exposing a surface of the microelectronic substrate, for example, to enhance a rate at which heat is transferred away from the microelectronic substrate. Alternatively, the encapsulating material can be removed to form heat transfer structures, such as pins or ribs, also to enhance a rate at which heat is transferred away from the microelectronic substrate. In still another embodiment, a portion of the encapsulating material or a support member to which the substrate is attached can be removed to define interlocking features that allow one microelectronic substrate package to be stacked on another and to resist relative movement between the two packages.

Abstract: The present invention is directed toward methods and apparatuses for encapsulating a microelectronic die or another type of microelectronic device. One aspect of the present invention is directed toward packaging a microelectronic die that is attached to either a first surface or a second surface of a substrate. The die can be encapsulated by positioning the die in a cavity of a substrate and sealing the substrate to the substrate. The method can further include injecting an encapsulation compound into the cavity at a first end of the substrate to move along the first surface of the substrate. This portion of the compound defines a first flow of compound along the first surface that moves in a first direction from a first end of the substrate toward a second end of the substrate.

Abstract: The present invention includes integrated circuit devices, synchronous-link dynamic random access memory devices, methods of forming an integrated circuit device and methods of forming a synchronous-link dynamic random access memory edge-mounted device. According to one aspect of the present invention, an integrated circuit device includes a semiconductor die and a first housing encapsulating the semiconductor die. A heat sink is positioned proximate the first housing and a second housing is formed to encapsulate at least a portion of the heat sink. The heat sink is preferably thermally coupled with the semiconductor die and configured to expel heat therefrom. Another aspect provides a method of forming an integrated circuit device including the steps of providing a semiconductor die; forming a first housing about the semiconductor die; thermally coupling a heat sink with the first housing; and forming a second housing about at least a portion of the heat sink following the thermally coupling.

Abstract: An encapsulated integrated circuit is provided including a semiconductor die, a printed circuit board, and an encapsulant. The printed circuit board is conductively coupled to the semiconductor die and comprises a laminate defining first and second major faces. The laminate includes a solder resist layer, an electrically conductive layer, and a bismaleimide triazine resin laminate including a selected laminated layer and an adjacent laminated layer. The electrically conductive layer is interposed between the solder resist layer and the underlying substrate. The selected laminated layer is disposed closer to the first major face than the adjacent laminated layer. The laminate includes at least one void formed therein so as to extend from one of the major faces through the solder resist layer and the electrically conductive layer at least as far as the adjacent laminated layer.

Abstract: In one aspect, the invention includes a method of encapsulating a semiconductor device, comprising: a) providing a semiconductor device; b) providing a dispensing apparatus having a plurality of dispensing orifices proximate the semiconductor device; and c) dispensing a liquid encapsulating material through the plurality of orifices and over the semiconductor device. In another aspect, the invention includes a method of forming an electronic package, comprising: a) providing a circuit board having a circuit pattern; b) joining a plurality of semiconductor devices to the circuit board in electrical connection with the circuit pattern; c) providing a dispensing apparatus having a plurality of dispensing orifices proximate the semiconductor devices; d) simultaneously dispensing liquid encapsulating material through at least two of the plurality of orifices and over at least two of the semiconductor devices; and e) curing the liquid encapsulating material.

Abstract: Methods for applying a heat sink to a semiconductor chip. A heat sink frame is removably attached to one or more heat sinks and is used to align the heat sinks with corresponding semiconductor chips. The semiconductor chips are preferably positioned on a semiconductor chip frame. The heat sinks are aligned with the semiconductor chips either before or after the semiconductor chips are substantially encapsulated within a molding material. The heat sink frame is detached from the heat sinks at a selected time after the heat sinks and the semiconductor chips have been aligned, whereby the heat sinks remain combined with the semiconductor chips. Detachment of the heat sink frame may be conducted before or, alternatively, after the semiconductor chips have been encapsulated. The methods of the invention facilitates the efficient and reliable application of heat sinks to semiconductor chips.

Abstract: The present invention includes integrated circuit devices, synchronous-link dynamic random access memory devices, methods of forming an integrated circuit device and methods of forming a synchronous-link dynamic random access memory edge-mounted device. According to one aspect of the present invention, an integrated circuit device includes a semiconductor die and a first housing encapsulating the semiconductor die. A heat sink is positioned proximate the first housing and a second housing is formed to encapsulate at least a portion of the heat sink. The heat sink is preferably thermally coupled with the semiconductor die and configured to expel heat therefrom. Another aspect provides a method of forming an integrated circuit device including the steps of providing a semiconductor die; forming a first housing about the semiconductor die; thermally coupling a heat sink with the first housing; and forming a second housing about at least a portion of the heat sink following the thermally coupling.

Abstract: Packaged microelectronic devices, methods for packaging microelectronic devices, and methods of operating microelectronic devices. In one embodiment, a packaged microelectronic device comprises a die including integrated circuitry, a first casing coating at least a portion of the die, a heat sink proximate to the die, and a second casing on at least a portion of the heat sink and coating at least a portion of the first casing. The first casing has a plurality of first interconnect elements, and the second casing engages the first interconnect elements to the first casing. The interconnect elements can be surface striations or other features that project into or away from the first casing. For example, the interconnect elements can be ridges extending across a surface of the first casing. In other embodiments, the first interconnect elements can be bumps and/or dimples across the surface of the first casing.

Abstract: The present invention includes integrated circuit devices, synchronous-link dynamic random access memory devices, methods of forming an integrated circuit device and methods of forming a synchronous-link dynamic random access memory edge-mounted device. According to one aspect of the present invention, an integrated circuit device includes a semiconductor die and a first housing encapsulating the semiconductor die. A heat sink is positioned proximate the first housing and a second housing is formed to encapsulate at least a portion of the heat sink. The heat sink is preferably thermally coupled with the semiconductor die and configured to expel heat therefrom. Another aspect provides a method of forming an integrated circuit device including the steps of providing a semiconductor die; forming a first housing about the semiconductor die; thermally coupling a heat sink with the first housing; and forming a second housing about at least a portion of the heat sink following the thermally coupling.

Abstract: The present invention includes circuits, methods of adhering an integrated circuit device to a substrate, and methods of forming a circuit. According to one aspect of the present invention, a method of forming a circuit includes: providing an integrated circuit device having an outer surface and a plurality of conductive bumps upon the outer surface; providing a substrate having a plurality of bond pads which correspond to respective ones of the conductive bumps; providing an electrically insulative adhesive over at least a portion of the outer surface of the integrated circuit device; and coupling the integrated circuit device and the substrate following the providing the adhesive, the coupling connecting the outer surface of the integrated circuit device with the substrate and forming a plurality of electrical interconnections comprising the conductive bumps and the bond pads.

Abstract: An integrated circuit package may be formed in part with an encapsulated region. Outflow of the encapsulant across critical electrical elements can be prevented by providing a cavity which collects encapsulant outflow between the region of encapsulation and the region where the critical components are situated. In one embodiment of the present invention, a surface may include a first portion covered by solder resist, having an area populated by bond pads, and a second portion which is encapsulated. Encapsulant flow over the bond pads is prevented by forming an opening in the solder resist proximate to the second portion to collect the encapsulant before it reaches the bond pads.

Abstract: The present invention includes circuits, methods of adhering an integrated circuit device to a substrate, and methods of forming a circuit. According to one aspect of the present invention, a method of forming a circuit includes: providing an integrated circuit device having an outer surface and a plurality of conductive bumps upon the outer surface; providing a substrate having a plurality of bond pads which correspond to respective ones of the conductive bumps; providing an electrically insulative adhesive over at least a portion of the outer surface of the integrated circuit device; and coupling the integrated circuit device and the substrate following the providing the adhesive, the coupling connecting the outer surface of the integrated circuit device with the substrate and forming a plurality of electrical interconnections comprising the conductive bumps and the bond pads.

Abstract: A method and apparatus for encapsulating microelectronic devices. In one embodiment, the method includes removing a portion of encapsulating material that at least partially surrounds a microelectronic substrate by directing a source of laser radiation toward the encapsulating material. The method can further include exposing a surface of the microelectronic substrate, for example, to enhance a rate at which heat is transferred away from the microelectronic substrate. Alternatively, the encapsulating material can be removed to form heat transfer structures, such as pins or ribs, also to enhance a rate at which heat is transferred away from the microelectronic substrate. In still another embodiment, a portion of the encapsulating material or a support member to which the substrate is attached can be removed to define interlocking features that allow one microelectronic substrate package to be stacked on another and to resist relative movement between the two packages.

Abstract: The present invention includes circuits, methods of adhering an integrated circuit device to a substrate, and methods of forming a circuit. According to one aspect of the present invention, a method of forming a circuit includes: providing an integrated circuit device having an outer surface and a plurality of conductive bumps upon the outer surface; providing a substrate having a plurality of bond pads which correspond to respective ones of the conductive bumps; providing an electrically insulative adhesive over at least a portion of the outer surface of the integrated circuit device; and coupling the integrated circuit device and the substrate following the providing the adhesive, the coupling connecting the outer surface of the integrated circuit device with the substrate and forming a plurality of electrical interconnections comprising the conductive bumps and the bond pads.