Patents by Inventor Joseph M. Shaheen
Joseph M. Shaheen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5123164Abstract: The present invention eliminates the release of vapors from an adhesive which bonds an organic multilayer substrate to a ceramic layer. Posts from the organic layer are plated up sufficiently high as to enter holes in the ceramic layer, but not completely penetrate through them. The holes may then be filled with solder, which both seals the holes against the escape of adhesive vapors and makes a good electrical contact with the post. A conductive pad may then be stenciled on top of the solder plug, and the chip or other electric component mounted to the pad. The hole is preferably plated with a conductive material prior to being filled with solder, so that solder may join the plating with the post. The solder plug is formed by forming a slurry of solder with alcohol, which is squeegeed into the holes and fused under pressure. A solder paste is then stenciled over the fused soldered power and is, itself, fused using the vapor phase.Type: GrantFiled: November 19, 1990Date of Patent: June 23, 1992Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, James S. Yamaguchi
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Patent number: 5030499Abstract: The present invention eliminates the release of vapors from an adhesive which bonds an organic multilayer substrate to a ceramic layer. Posts from the organic layer are plated up sufficiently high as to enter holes in the ceramic layer, but not completely penetrate through them. The holes may then be filled with solder, which both seals the holes against the escape of adhesive vapors and makes a good electrical contact with the post. A conductive pad may then be stenciled on top of the solder plug, and the chip or other electric component mounted to the pad. The hole is preferably plated with a conductive material prior to being filled with solder, so that the solder may join the plating with the post. The solder plug is formed by forming a slurry of solder with alcohol, which is squeegeed into the holes and fused under pressure. A solder paste is then stenciled over the fused soldered power and is, itself, fused using the vapor phase.Type: GrantFiled: December 8, 1989Date of Patent: July 9, 1991Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, James S. Yamaguchi
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Patent number: 4991285Abstract: A multi-layer board is fabricated by plating up conductive posts on a nonconductive layer. The tops of the posts are planarized, resulting in sharp corners. The posts are aligned with a template, which has a hole above each post, and a second nonconductive layer is placed between the top of the posts and the bottom of the template. The two layers are laminated together by compressing the second layer between the first layer and the template, and the posts punch through the second layer. Conductive traces may then be etched or deposited between the posts tops, and the process may be repeated as many times as desired.Type: GrantFiled: November 17, 1989Date of Patent: February 12, 1991Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, John Simone
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Patent number: 4740414Abstract: A multilayer board comprising a novel construction of ceramic and organic layers to reduce difficulties commonly encountered by board materials and components attached thereto having differing thermal coefficients of expansion. The multilayer board comprises an inorganic ceramic surface which is affixedly attached via a compliant adhesive to a conventional plated up post or plated thru hole organic multilayer board.Type: GrantFiled: November 17, 1986Date of Patent: April 26, 1988Assignee: Rockwell International CorporationInventor: Joseph M. Shaheen
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Patent number: 4548661Abstract: A multiconductor flat cable incorporates an approximately right angle turn in its conductor runs. The right angle turn is provided by first securing the conductor runs in a desired spacing through a first lamination of insulation cover and base sheets while leaving portions of the conductor runs exposed through a window in the first lamination. The first lamination is then severed at the lateral edges of the window so that an end portion of the first lamination may be moved ninety degrees relative to a remaining body portion thereto. The right angle turn is then secured by forming a second lamination with cover and base layers so as to overlap the first lamination and the turn in the conductor runs.Type: GrantFiled: May 6, 1982Date of Patent: October 22, 1985Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: Edward A. Escallier, Stanley R. Dawson, Joseph M. Shaheen
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Patent number: 4501929Abstract: A multiconductor flat cable incorporates an approximately right angle turn in its conductor runs. The right angle turn is provided by first securing the conductor runs in a desired spacing through a first lamination of insulation cover and base sheets while leaving portions of the conductor runs exposed through a window in the first lamination. The first lamination is then severed at the lateral edges of the window so that an end portion of the first lamination may be moved ninety degrees relative to a remaining body portion thereto. The right angle turn is then secured by forming a second lamination with cover and base layers so as to overlap the first lamination and the turn in the conductor runs.Type: GrantFiled: March 7, 1984Date of Patent: February 26, 1985Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: Edward A. Escallier, Stanley R. Dawson, Joseph M. Shaheen
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Patent number: 4496215Abstract: A fiber optic cable for connecting at least one optical transmitter to at least one optical sensor in an electronic assembly, the fiber optic cable comprising: a first surface layer; a second surface layer, the first and second surface layers being in stacked parallel plane relation; a resin layer, the first surface layer and the second surface layer being bonded together by the resin layer; at least one fiber optic filament, each fiber optic filament being embedded in the resin layer in a predetermined pattern; means for terminating each respective fiber optic filament to facilitate optically coupling each respective optical transmitter to a respective optical sensor; the first surface layer, the second surface layer, the resin layer and the fiber optic filament being laminated forming a relatively flat ribbon cable having a cross section relatively free of voids; whereby the fiber optic cable is formed as a relatively thin, flexible, flat layer facilitating installation in an electronic assembly.Type: GrantFiled: September 23, 1982Date of Patent: January 29, 1985Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, Herbert W. Yancey
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Patent number: 4423467Abstract: The invention comprises a connection array for establishing a plurality of electrical connections between circuit pads of a support, such as a circuit board, and contacts of an electrical housing, such as a hermetic chip carrier, wherein the contacts comprise semi-circular vertical indentations in the housing periphery with each indentation having a conductive layer therein. A plurality of pillars, which may be electroplated, extend vertically above the support in an array respectively corresponding to the outline of the indentations with each pillar being connected to different pad of the support and the pillars having dimensions to permit at least partial entry into the indentations whereby solder may be introduced between the pillars and associated conductive layers to establish visible and inspectable electrical connections therebetween.Type: GrantFiled: December 15, 1980Date of Patent: December 27, 1983Assignee: Rockwell International CorporationInventor: Joseph M. Shaheen
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Patent number: 4247361Abstract: A method of etching a surface of a body including the steps of applying a suitable modified epoxy thermo-setting adhesive coating to an etchant resisting masking film; punching the masking film in a predetermined pattern corresponding to the pattern to be etched on the body; applying the masking film to a major surface of the body to be etched, thereby exposing a portion of the major surface corresponding to the predetermined pattern; setting the adhesive coating by applying heat so that the masking film is securely attached to the body; and subsequently applying an etchant to the body covered by the making film so that the predetermined pattern is etched into the major surface of the body.Type: GrantFiled: June 18, 1979Date of Patent: January 27, 1981Assignee: Rockwell International CorporationInventor: Joseph M. Shaheen
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Patent number: 4233103Abstract: A high temperature-resistant, conductive adhesive composition for bonding a semiconductor die to a substrate comprising a mixture of (1) an alloy of gallium-tin eutectic and gold and (2) a polyimide resin.Type: GrantFiled: December 20, 1978Date of Patent: November 11, 1980Assignee: The United States of America as represented by the Secretary of the Air ForceInventor: Joseph M. Shaheen
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Patent number: 4147669Abstract: An electrically and thermally conductive adhesive containing a metal alloy dispersed in a resin is disclosed. The composition of the adhesive may include a resin mixture and a gallium-metal alloy. The composition is very stable, is a liquid at room temperature and cures at a relatively low temperature with excellent adhesion and conduction properties and is resistant to relatively high temperatures.Type: GrantFiled: January 12, 1978Date of Patent: April 3, 1979Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, Leo J. Quintana
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Patent number: 4052787Abstract: A method for producing beam leads, i.e. electrical contacts, on flexible circuits or multilayer circuits for interconnecting devices is disclosed. The method consists of processing a metal foil to expose a beam lead interconnection pattern, plating the exposed pattern with metal, coating a base insulating layer with an adhesive, punching cavities in the adhesive coated insulating layer, engaging the coated side of the base insulating layer to the metal foil, and applying a cushioning material on the opposite side of the adhesive coated insulating layer. The metal foil and the insulating layer are then laminated causing the cushioning material to flow into the pre-punched cavities thereby providing a protective cushioning-type backing for the metal-plated beam lead interconnection pattern.Type: GrantFiled: December 18, 1975Date of Patent: October 11, 1977Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, John Simone
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Patent number: 4018491Abstract: A carrier for making electrical connection with a microelectronic device without bonding the device to the carrier is disclosed. The carrier is designed to accommodate a device such as, but not limited to, a magnetic bubble domain memory chip. The circuit board and keeper board are joined by a hinge having tension means to readily permit opening and locking of the carrier. When the carrier is in the open position, a device is positioned in the carrier. By locking the carrier, the device is secured and the required electrical connection is made between the carrier and the device. The carrier can now be connected to a test fixture for evaluating the electrical characteristics of the chip without bonding any leads or the carrier may be utilized in a system as an integral part of that system.Type: GrantFiled: March 8, 1976Date of Patent: April 19, 1977Assignee: Rockwell International CorporationInventors: Andrew J. Niedzwiecke, Joseph M. Shaheen
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Patent number: 3955068Abstract: A composite comprising a flexible substrate structure including a base and support members projecting therefrom; a network of resistor segments; a conductor network interposed between the resistor network and the base of the substrate structure for cooperating with the projecting support members of the substrate structure to support the resistor segments and for supplying power to the resistor segments; and, a backup board affixed to the substrate on the side thereof opposite the resistor segments. The composite can be used, e.g., as the printing element in thermal print heads. The resistor network can be formed on top of the conductor network by casting the flexible projecting support members on the base between the conductors flush with the outer surfaces of the conductors for supporting the resistor network thereon. Alternatively, the projecting support members and the base can be formed as one piece.Type: GrantFiled: September 27, 1974Date of Patent: May 4, 1976Assignee: Rockwell International CorporationInventor: Joseph M. Shaheen
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Patent number: RE29284Abstract: Electronic interconnections are formed between a plurality of layers of multilayer board by first applying a removable and reuseable dielectric mask over the surface of a circuit pattern formed on an insulating layer. The mask includes a pattern of openings which define locations for forming interconnecting members between portions of said circuit pattern and a subsequently formed circuit pattern. After the openings have been filled, the removable mask is replaced by a permanent insulating layer. The process of applying the mask and filling the openings is repeated to produce a multilayer board having a plurality of layers.Type: GrantFiled: November 6, 1970Date of Patent: June 28, 1977Assignee: Rockwell International CorporationInventors: Joseph M. Shaheen, Leo J. Quintana