Abstract: A hermetically sealed package effectively dissipates heat generated inside the package. The hermetically sealed package includes a hermetically sealed enclosure formed from a base portion and a lid. Within the enclosure two or more heat generating elements, such as integrated circuit chips, are supported by the base portion and rise to different heights from the base portion. At least one resilient heat exchange component, such as a leaf spring, extends from the lid of the hermetically sealed enclosure to the different heights. The heat exchange component is configured to conduct heat from the plurality of heat generating elements to the lid of the enclosure.

Abstract: A hermetically sealed package effectively dissipates heat generated inside the package. The hermetically sealed package includes a hermetically sealed enclosure formed from a base portion and a lid. Within the enclosure two or more heat generating elements, such as integrated circuit chips, are supported by the base portion and rise to different heights from the base portion. At least one resilient heat exchange component, such as a leaf spring, extends from the lid of the hermetically sealed enclosure to the different heights. The heat exchange component is configured to conduct heat from the plurality of heat generating elements to the lid of the enclosure.

Abstract: A hermetically sealed package effectively dissipates heat generated inside the package. The hermetically sealed package includes a hermetically sealed enclosure formed from a base portion and a lid. Within the enclosure two or more heat generating elements, such as integrated circuit chips, are supported by the base portion and rise to different heights from the base portion. At least one resilient heat exchange component, such as a leaf spring, extends from the lid of the hermetically sealed enclosure to the different heights. The heat exchange component is configured to conduct heat from the plurality of heat generating elements to the lid of the enclosure.

Abstract: A hermetically sealed package effectively dissipates heat generated inside the package. The hermetically sealed package includes a hermetically sealed enclosure formed from a base portion and a lid. Within the enclosure two or more heat generating elements, such as integrated circuit chips, are supported by the base portion and rise to different heights from the base portion. At least one resilient heat exchange component, such as a leaf spring, extends from the lid of the hermetically sealed enclosure to the different heights. The heat exchange component is configured to conduct heat from the plurality of heat generating elements to the lid of the enclosure.

Abstract: An apparatus includes a cavity formed in a support structure, the support structure being operable to support a semiconductor device. A circuit element is disposed in the cavity in the support structure, and the cavity in the support structure is filled with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material. The semiconductor device is electrically connected to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.

Abstract: An integrated circuit chip stack and a method for forming the same in which bond pads of an interposer are directly bonded to bond pads of a package substrate using only pre-solder. The interposer can have a bond pad pitch of less than 150 micrometers. The interposer can be an organic interposer. The pro-solder can be melted to make contact with the bond pads of the package substrate and the interposer. After solidifying, the pre-solder can form an electrical connection between a bond pad of the interposer and a bond pad of the package substrate.

Abstract: An apparatus includes a cavity formed in a support structure, the support structure being operable to support a semiconductor device. A circuit element is disposed in the cavity in the support structure, and the cavity in the support structure is filled with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material. The semiconductor device is electrically connected to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.

Abstract: A method and apparatus are provided in which a cavity is formed in a support structure, the support structure being operable to support a semiconductor device, disposing at least a portion of a circuit element in the cavity in the support structure, filling the cavity in the support structure with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material, and electrically connecting the semiconductor device to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.

Abstract: A method and apparatus are provided in which a cavity is formed in a support structure, the support structure being operable to support a semiconductor device, disposing at least a portion of a circuit element in the cavity in the support structure, filling the cavity in the support structure with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material, and electrically connecting the semiconductor device to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.

Abstract: Circuit elements such as DC blocking capacitors used in communication such as a serial communication link between two or more electrical components are disposed in pre-existing openings in a support structure that supports at least one of the two electrical components. The openings may be plated and used for signal transmission from the one electrical component to a printed circuit board (PCB) supporting the substrate. The DC blocking capacitors may be oriented substantially vertically, and a non-conducting material may be disposed in each opening in the substrate such that the non-conducting material at least partially surrounds and fixes the orientation of the DC blocking capacitor disposed in the opening.

Abstract: High capacitance value capacitors are formed using bimetal foils of an aluminum layer attached to a copper layer. The copper side of a bimetallic copper/aluminum foil or a monometallic aluminum foil is temporarily protected using aluminum or other materials, to form a sandwich. The exposed aluminum is treated to increase the surface area of the aluminum by at least one order of magnitude, while not attacking any portion of the protected metal. When the sandwich is separated, the treated bimetal foil is formed into a capacitor, where the copper layer is one electrode of the capacitor and the treated aluminum layer is in intimate contact with a dielectric layer of the capacitor.

Abstract: A tunable high impedance surface device (100) includes a conductive ground plane (105) and a plurality of conductive elements (110-114) electrically connected to the conductive ground plane (105). The device (100) also includes a plurality of capacitive elements (120-124) operable to vary a predetermined electromagnetic characteristic of the apparatus and standoffs (130, 132) between the plurality of capacitive elements (120-124) and the plurality of conductive elements (110-114). In one form, laser-drilled and electrically conductive micro-vias (136, 138) extend through the standoffs (130, 132) thereby electrically connecting the plurality of capacitive elements (120-124) to a data bus (140). The capacitive elements (120-124) may be integral with a circuit board (144) that supports the plurality conductive elements (110-114).

Abstract: A first and second capacitor plate are provided (101 and 102). Each capacitor plate has an opening disposed therethrough with the second capacitor plate being disposed substantially opposite the first capacitor plate. A first electrically conductive path interface is then disposed (103) in one of these openings as is at least a second electrically conductive path interface (104).

Abstract: Fabricating (100, 1300) a printed circuit board includes fabricating patterned conductive traces (305, 310, 1410, 1415) onto a foil, laminating the patterned conductive traces to a printed circuit board substrate (405, 1505) by pressing on the foil, such that the conductive traces are pressed into a dielectric layer of the printed circuit board, and removing the foil to expose a co-planar surface of conductive trace surfaces and dielectric surfaces. Removal may be done by peeling (125) and/or etching (130, 1315).

Abstract: A method for forming embedded capacitors on a printed circuit board is disclosed. The capacitor is formed on the printed circuit board by a depositing a first dielectric layer over one or more electrodes situated on the PCB. Another electrode is formed on top of the first dielectric layer and a second dielectric layer is deposited on top of that electrode. A third electrode is formed on top of the second dielectric layer. The two dielectric layers are abrasively delineated in a single step by a method such as sand blasting to define portions of the first and second dielectric layers to create a multilayer capacitive structure.

Abstract: High capacitance value capacitors are formed using bimetal foils of an aluminum layer attached to a copper layer. The copper side of a bimetallic copper/aluminum foil or a monometallic aluminum foil is temporarily protected using aluminum or other materials, to form a sandwich. The exposed aluminum is treated to increase the surface area of the aluminum by at least one order of magnitude, while not attacking any portion of the protected metal. When the sandwich is separated, the treated bimetal foil is formed into a capacitor, where the copper layer is one electrode of the capacitor and the treated aluminum layer is in intimate contact with a dielectric layer of the capacitor.

Abstract: A tunable high impedance surface device (100) includes a conductive ground plane (105) and a plurality of conductive elements (110-114) electrically connected to the conductive ground plane (105). The device (100) also includes a plurality of capacitive elements (120-124) operable to vary a predetermined electromagnetic characteristic of the apparatus and standoffs (130, 132) between the plurality of capacitive elements (120-124) and the plurality of conductive elements (110-114). In one form, laser-drilled and electrically conductive micro-vias (136, 138) extend through the standoffs (130, 132) thereby electrically connecting the plurality of capacitive elements (120-124) to a data bus (140). The capacitive elements (120-124) may be integral with a circuit board (144) that supports the plurality conductive elements (110-114).

Abstract: Fabricating (100, 1300) a printed circuit board includes fabricating patterned conductive traces (305, 310, 1410, 1415) onto a foil, laminating the patterned conductive traces to a printed circuit board substrate (405, 1505) by pressing on the foil, such that the conductive traces are pressed into a dielectric layer of the printed circuit board, and removing the foil to expose a co-planar surface of conductive trace surfaces and dielectric surfaces. Removal may be done by peeling (125) and/or etching (130, 1315).

Abstract: A method is for fabricating an embedded capacitance printed circuit board assembly (400, 1100). The embedded capacitance printed circuit board assembly includes two embedded capacitance structures (110). Each capacitance structure (110) includes a crystallized dielectric oxide layer (115) sandwiched between an outer electrode layer (120) and an inner electrode layer (125) in which the two inner electrode layers are electrically connected together. A rivet via (1315) and a stacked via (1110) formed from a button via (910) and a stacked blind via (1111) may be used to electrically connect the two inner electrode layers together. A spindle via (525) may be formed through the inner and outer layers. The multi-layer printed circuit board may be formed from a capacitive laminate (100) that includes two capacitance structures.

Abstract: A textured dielectric patch antenna is fabricated by applying a first mask pattern (310, 510, 610, 710, 915, 1015, 1210) to a first side of a solid panel made of a first material that is a ceramic dielectric and then sandblasting the solid panel through the first mask pattern from the first side to at least partially generate a shaped cavity (315, 920, 1040). The shaped cavity of the solid panel may be filled with a second material (330, 740). The first and second materials have substantially differing dielectric constants. The first side and second side of the solid panel are metallized (325), forming a patch antenna. The shaped cavities can be made more complex by using additional masking and/or sandblasting steps.