Patents by Inventor Jriyan Jerry Chen

Jriyan Jerry Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8076222
    Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: December 13, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
  • Patent number: 7955890
    Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: June 7, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
  • Patent number: 7833885
    Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: November 16, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
  • Publication number: 20100089319
    Abstract: A method and apparatus having a RF return path with low impedance coupling a substrate support to a chamber wall in a plasma processing system is provided. In one embodiment, a processing chamber includes a chamber body having a chamber sidewall, a bottom and a lid assembly supported by the chamber sidewall defining a processing region, a substrate support disposed in the processing region of the chamber body, a shadow frame disposed on an edge of the substrate support assembly, and a RF return path having a first end coupled to the shadow frame and a second end coupled to the chamber sidewall.
    Type: Application
    Filed: October 9, 2009
    Publication date: April 15, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Carl A. Sorensen, John M. White, Jozef Kudela, Jonghoon Baek, Jriyan Jerry Chen, Steve McPherson, Soo Young Choi, Robin L. Tiner
  • Publication number: 20090315030
    Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.
    Type: Application
    Filed: June 17, 2009
    Publication date: December 24, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
  • Publication number: 20090200552
    Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.
    Type: Application
    Filed: November 26, 2008
    Publication date: August 13, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Tae Kyung Won, Soo Young Choi, Dong Kil Yim, Jriyan Jerry Chen, Beom Soo Park
  • Publication number: 20090200551
    Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.
    Type: Application
    Filed: September 4, 2008
    Publication date: August 13, 2009
    Inventors: Tae Kyung Won, Soo Young Chol, Dong-Kil Yim, Jriyan Jerry Chen
  • Publication number: 20080138974
    Abstract: A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at least 2 wt % silicon and preferably less than 20 wt %. An adhesion layer may be formed between the barrier layer and the bonding pad. For copper metallization, the adhesion layer may contain titanium or tantalum; for aluminum metallization, it may be aluminum. The nickel silicon alloy may be deposited by magnetron sputtering. Commercially available NiS4.5% sputter targets have provided a superior under-bump metallization (UBM) with lead-free tin solder bumps. Dopants other than silicon/may be used to reduce the magnetic permeability and provide other advantages of the invention.
    Type: Application
    Filed: November 27, 2007
    Publication date: June 12, 2008
    Applicant: Applied Materials, Inc.
    Inventors: Yanping Li, Jriyan Jerry Chen, Lisa Yang
  • Patent number: 7321140
    Abstract: A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at least 2 wt % silicon and preferably less than 20 wt %. An adhesion layer may be formed between the barrier layer and the bonding pad. For copper metallization, the adhesion layer may contain titanium or tantalum; for aluminum metallization, it may be aluminum. The nickel silicon alloy may be deposited by magnetron sputtering. Commercially available NiSi4.5% sputter targets have provided a superior under-bump metallization (UBM) with lead-free tin solder bumps. Dopants other than silicon/may be used to reduce the magnetic permeability and provide other advantages of the invention.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: January 22, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Yanping Li, Jriyan Jerry Chen, Lisa Yang