Patents by Inventor Judah L. Adelman

Judah L. Adelman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7149674
    Abstract: A method of improving performance of a dual Vt integrated circuit is disclosed in which a first value is calculated for each transistor of the integrated circuit that has a first threshold voltage level. The first value is based at least in part on delay and leakage of the circuit calculated as if the corresponding transistor had a second threshold voltage level. One transistor is then selected based on the first values. The threshold voltage of the selected transistor is then set to the second threshold voltage level. The area of at least one transistor within the circuit is modified, and the circuit is then sized to a predetermined area. The process may then be repeated if the circuit performance fails to meet a defined constraint.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: December 12, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Supamas Sirichotiyakul, David T. Blaauw, Timothy J. Edwards, Chanhee Oh, Rajendran V. Panda, Judah L. Adelman, David Moshe, Abhijit Dharchoudhury
  • Patent number: 5666300
    Abstract: In a data arithmetic logic unit (54), power consumption is reduced by eliminating unnecessary write backs to the destination register (82) following a MAC (multiply/accumulate) operation. A series of instructions provided to the data ALU (arithmetic/logic) (54) are monitored by a control circuit (89). When two or more consecutive instructions having identical destinations for a result are detected, the result is written to a pipeline register (78) instead of to the destination register (82) named in the consecutive instructions. Thus, only a short, lightly loaded bus to the pipeline register (78) is driven, instead of the longer heavily loaded bus to the destination register (82).
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: September 9, 1997
    Assignee: Motorola, Inc.
    Inventors: Judah L. Adelman, David Galanti, Yoram Salant
  • Patent number: 5598362
    Abstract: A data ALU (arithmetic logic unit) (54) in a data processing system (20) performs both 24-bit arithmetic, and 16-bit exact arithmetic (including shifting and logical operations) using the same hardware. For a multiply/accumulate operation in 16-bit exact mode, shifting operations are used to align the operands so that 16-bit exact mode is transparent to a user. An entire instruction set can be executed in 24-bit mode or 16-bit exact mode. The same instructions and hardware are used in both modes. A transition between modes is performed by changing a status bit (97) in a status register (95).
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: January 28, 1997
    Assignee: Motorola Inc.
    Inventors: Judah L. Adelman, Paul Marino, Avner Goren, Garth Hillman
  • Patent number: 5341113
    Abstract: A voltage controlled oscillator (VCO) (2) provides an output signal which has a 50% duty cycle and a frequency which depends on the voltage of a control signal (V) supplied thereto. The VCO (2) comprises first (C.sub.L) and second (C.sub.R) capacitors and first (3) and second (5) circuits. Each of the first and second circuits comprises a current supply arrangement (10, 12, 14, or 18, 20, 22) coupled to a respective one of the capacitors (C.sub.L or C.sub.R) and to receive the control signal (V), and a Schmitt trigger (6 or 16) coupled to the respective current supply arrangement and to the other capacitor, which is not coupled to the respective current supply arrangement. Each current supply arrangement of the first and second circuits alternately charges and discharges the respective capacitor, in dependence on the switching of the respective Schmitt trigger, so that the VCO (2) oscillates between the charging of the first and the charging of the second capacitor.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: August 23, 1994
    Assignee: Motorola, Inc.
    Inventors: Nathan Baron, Judah L. Adelman