Abstract: The present invention relates to a method for eliminating noise in a signal. The frequency band of the signal is divided into sub-bands, whereafter the useful value of the signal of each sub-band is determined by comparing the signal level to a reference level, in which case a constant signal of substantially the same level as the reference level is suppressed as noise and a varying signal, defined as a useful signal, is combined, unsuppressed, with the useful signals of the other sub-bands. The frequency band of the channel is divided into sub-bands by means of an all-pass filter construction. The method can be implemented using an analog or a digital filter construction.

Abstract: An FM or PM signal is demodulated so that the cycle time of the modulated input signal is measured using a time-to-digital converter comprising a counter that uses a moderate clock frequency as a reference clock, a digital delay line interpolator and a control circuitry. The counter is used for rough digitization and the delay line for interpolating the moment of zero-crossing inside a clock cycle. Total delay of the delay line, i.e., the range of time intervals the interpolator is able to measure, is actively kept equal to the cycle time of the reference clock. When the number of delay elements in the delay line is a power of two, the result of the delay line interpolator may be used directly as the least significant bits of the measurement.

Abstract: The invention concerns are interpolating frequency synthesizer based on digital phase locking, with which frequencies can be produced which lie between frequencies defined by integer divisors. Traditional frequency synthesizers employ frequency dividers in which the dividing ratio is an integer. The circuit of the invention comprises member (8, 9), in one of which the reference frequency (f.sub.o) or the VCO frequency (f.sub.x), or the frequency obtained from them by division, is multiplied with a coefficient L and in the other member the corresponding frequency is multiplied by L+ .DELTA.L; and members (2, 7), in which the first pulses going to the phase detector (3) are lengthened by a time corresponding to a given integer number k1 of pulses formed in the number (8), and the other pulses are lengthened by a time corresponding to a given integer number k2 of pulses formed in the member (9).

Abstract: An electric component is disclosed with trimmable complex resistive-capacitive impedance comprising a first resistor layer forming a ground plane, an insulation layer connected thereover and a second resistor layer connected over the insulation layer. The second resistor layer is divided into a plurality of resistor layer portions. The resistor layer has one edge which is attached to a power drive connector and an opposite edge which is step shaped so that the resistor layer portions are varied both in length and in width. The resistor layer portions are selectively connected and disconnected from each other to produce a desired impedance value.