Patents by Inventor Jui-Hung HO
Jui-Hung HO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230386809Abstract: A magnetic shield reduces external noise in a chamber including a target and at least one electromagnet for copper physical vapor deposition (PVD). The shield may have a thickness in a range from approximately 0.1 mm to approximately 10 mm to provide sufficient protection from radio frequency and other electromagnetic signals. As a result, copper atoms in the chamber undergo less re-direction from external noise. Additionally, even when hardware failure occurs during PVD (e.g., an electromagnet malfunctions, a wafer stage is not level, and/or a flow optimizer induces too much shift, among other examples), the copper atoms are less susceptible to small re-directions from external noise. As a result, back end of line (BEOL) and/or middle end of line (MEOL) conductive structures are formed in a more uniform manner, which increases conductivity and improves lifetime of an electronic device including the BEOL and/or MEOL conductive structures.Type: ApplicationFiled: August 10, 2023Publication date: November 30, 2023Inventors: Chia-Hung TSAI, Chin-Szu LEE, Szu-Hua WU, Jui-Hung HO, Chi-Hung LIAO, Yu-Jen CHIEN
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Publication number: 20230260770Abstract: A magnetic shield reduces external noise in a chamber including a target and at least one electromagnet for copper physical vapor deposition (PVD). The shield may have a thickness in a range from approximately 0.1 mm to approximately 10 mm to provide sufficient protection from radio frequency and other electromagnetic signals. As a result, copper atoms in the chamber undergo less re-direction from external noise. Additionally, even when hardware failure occurs during PVD (e.g., an electromagnet malfunctions, a wafer stage is not level, and/or a flow optimizer induces too much shift, among other examples), the copper atoms are less susceptible to small re-directions from external noise. As a result, back end of line (BEOL) and/or middle end of line (MEOL) conductive structures are formed in a more uniform manner, which increases conductivity and improves lifetime of an electronic device including the BEOL and/or MEOL conductive structures.Type: ApplicationFiled: February 16, 2022Publication date: August 17, 2023Inventors: Chia-Hung TSAI, Chin-Szu LEE, Szu-Hua WU, Jui-Hung HO, Chi-Hung LIAO, Yu-Jen CHIEN
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Patent number: 11696510Abstract: The present disclosure describes an exemplary method that can prevent or reduce out-diffusion of Cu from interconnect layers to magnetic tunnel junction (MTJ) structures. The method includes forming an interconnect layer over a substrate that includes an interlayer dielectric stack with openings therein; disposing a metal in the openings to form corresponding conductive structures; and selectively depositing a diffusion barrier layer on the metal. In the method, selectively depositing the diffusion barrier layer includes pre-treating the surface of the metal; disposing a precursor to selectively form a partially-decomposed precursor layer on the metal; and exposing the partially-decomposed precursor layer to a plasma to form the diffusion barrier layer. The method further includes forming an MTJ structure on the interconnect layer over the diffusion barrier layer, where the bottom electrode of the MTJ structure is aligned to the diffusion barrier layer.Type: GrantFiled: May 28, 2021Date of Patent: July 4, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jung-Tang Wu, Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu
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Publication number: 20230137291Abstract: The present disclosure describes an exemplary method that can prevent or reduce out-diffusion of Cu from interconnect layers to magnetic tunnel junction (MTJ) structures. The method includes forming an interconnect layer over a substrate that includes an interlayer dielectric stack with openings therein; disposing a metal in the openings to form corresponding conductive structures; and selectively depositing a diffusion barrier layer on the metal. In the method, selectively depositing the diffusion barrier layer includes pre-treating the surface of the metal; disposing a precursor to selectively form a partially-decomposed precursor layer on the metal; and exposing the partially-decomposed precursor layer to a plasma to form the diffusion barrier layer. The method further includes forming an MTJ structure on the interconnect layer over the diffusion barrier layer, where the bottom electrode of the MTJ structure is aligned to the diffusion barrier layer.Type: ApplicationFiled: December 30, 2022Publication date: May 4, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jung-Tang WU, Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu
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Publication number: 20210288249Abstract: The present disclosure describes an exemplary method that can prevent or reduce out-diffusion of Cu from interconnect layers to magnetic tunnel junction (MTJ) structures. The method includes forming an interconnect layer over a substrate that includes an interlayer dielectric stack with openings therein; disposing a metal in the openings to form corresponding conductive structures; and selectively depositing a diffusion barrier layer on the metal. In the method, selectively depositing the diffusion barrier layer includes pre-treating the surface of the metal; disposing a precursor to selectively form a partially-decomposed precursor layer on the metal; and exposing the partially-decomposed precursor layer to a plasma to form the diffusion barrier layer. The method further includes forming an MTJ structure on the interconnect layer over the diffusion barrier layer, where the bottom electrode of the MTJ structure is aligned to the diffusion barrier layer.Type: ApplicationFiled: May 28, 2021Publication date: September 16, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jung-Tang WU, Jui-Hung HO, Chin-Szu LEE, Meng-Yu WU, Szu-Hua WU
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Patent number: 11024801Abstract: The present disclosure describes an exemplary method that can prevent or reduce out-diffusion of Cu from interconnect layers to magnetic tunnel junction (MTJ) structures. The method includes forming an interconnect layer over a substrate that includes an interlayer dielectric stack with openings therein; disposing a metal in the openings to form corresponding conductive structures; and selectively depositing a diffusion barrier layer on the metal. In the method, selectively depositing the diffusion barrier layer includes pre-treating the surface of the metal; disposing a precursor to selectively form a partially-decomposed precursor layer on the metal; and exposing the partially-decomposed precursor layer to a plasma to form the diffusion barrier layer. The method further includes forming an MTJ structure on the interconnect layer over the diffusion barrier layer, where the bottom electrode of the MTJ structure is aligned to the diffusion barrier layer.Type: GrantFiled: December 5, 2018Date of Patent: June 1, 2021Inventors: Jung-Tang Wu, Jui-Hung Ho, Chin-Szu Lee, Meng-Yu Wu, Szu-Hua Wu
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Publication number: 20200006639Abstract: The present disclosure describes an exemplary method that can prevent or reduce out-diffusion of Cu from interconnect layers to magnetic tunnel junction (MTJ) structures. The method includes forming an interconnect layer over a substrate that includes an interlayer dielectric stack with openings therein; disposing a metal in the openings to form corresponding conductive structures; and selectively depositing a diffusion barrier layer on the metal. In the method, selectively depositing the diffusion barrier layer includes pre-treating the surface of the metal; disposing a precursor to selectively form a partially-decomposed precursor layer on the metal; and exposing the partially-decomposed precursor layer to a plasma to form the diffusion barrier layer. The method further includes forming an MTJ structure on the interconnect layer over the diffusion barrier layer, where the bottom electrode of the MTJ structure is aligned to the diffusion barrier layer.Type: ApplicationFiled: December 5, 2018Publication date: January 2, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jung-Tang WU, Jui-Hung HO, Chin-Szu LEE, Meng-Yu WU, Szu-Hua WU