Abstract: In a signal processing method for use in a three-dimensional computer graphics system, in order to increase the processing speed between the raster engine and a frame buffer, the frame buffer is accessed by an interleaving method and a Z-value comparison is performed in a Z-buffer of the frame buffer. The bandwidth of the frame buffer can be improved by executing a modify cycle in a memory.

Abstract: An anti-aliasing method greatly reduces the required size of the look-up table (LUT) memory space. The LUT memory is divided into four partitions and the four partitions are partitioned in parallel. This method allows for a great reduction in the amount of memory which needs to be incorporated into an application-specific integrated circuit (ASIC) which results in lower costs.

Abstract: In a computer graphics system, a method for generating a subpixel mask for polygon edges directly by an operation without using a look-up table, includes the steps of forming subblocks by dividing a pixel into n subpixels depending on the slope of the polygon edge, calculating subblock coverage which is a distance from the pixel boundary to the intersection point of n subblocks and polygon edge, and generating an n.times.n subpixel mask depending on the calculated subblock coverage. In an apparatus using the method, edge-generated aliasing is removed.

Abstract: A memory addressing method and apparatus therefor having a pair of cell blocks is characterized in that the pair of cell blocks are alternately column-addressed in such a manner that the column line of one cell block is pre-charged while the column line of the other cell block is addressed, and that subsequently, the pre-charged column line of the other cell block is addressed while the next column line of the one cell block is pre-charged. Therefore, the memory device wherein a plurality of cell blocks are alternately addressed can achieve an approximately doubled speed of operation.