Patents by Inventor Jun-ichi Nishizawa

Jun-ichi Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4985738
    Abstract: A semiconductor thyristor of the Static Induction type having a split-gate structure, e.g., driving gates and non-driving gates, for controlling cathode-anode current flow. The split-gate structure comprises a plurality of primary gates formed in recesses of the channel region which respond to an external control signal for providing primary current control, and a plurality of secondary non-driving gates which are influenced by electric fields in the channel region extant during thyristor operation for providing secondary current control. In operation, the driving and non-driving gates coact so that the non-driving gates, having an induced potential lower than the potential applied to the driving gates, absorb charge carriers injected in the channel during thyristor operation.
    Type: Grant
    Filed: December 5, 1986
    Date of Patent: January 15, 1991
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4984049
    Abstract: A static induction thyristor having a mesh like gate region in front of the cathode, and between the gate region and the cathode a high resistance region having effective impurity concentration of 10.sub.11 cm.sup.-3 -5.times.10.sup.14 cm.sup.-3 is interposed, and the voltage gain decided by the gate length, gate interval and the gate-to-anode distance is made 10 or more so that the forward voltage drop is small, providing high speed switching ability and a large reverse breakdown voltage.
    Type: Grant
    Filed: July 5, 1988
    Date of Patent: January 8, 1991
    Assignees: Zaidan Hozin Handotai Kenkyu Shinkokai, Toyo Denki Seizo Kabushiki Kaisha
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi, Yoshinobu Ohtsubo
  • Patent number: 4968491
    Abstract: In conducting a liquid phase epitaxial growth of a Zn crystal on a substrate wherein a batch of Se melt serving as a solvent is used and relying on a vapor pressure controlling technique and a temperature difference method, a Zn vapor pressure controlling region is disposed, via the Se melt, in a direction vertical to the surface of the substrate which is contained in the growth region, and a ZnSe source crystal is disposed in such a way that it is supplied into the Se melt in a lateral direction of this melt. Whereby, a ZnSe single crystal having a good cyrstal perfection, and a good linearity of the thickness of the grown crystal relative to time can be obtained.
    Type: Grant
    Filed: August 25, 1987
    Date of Patent: November 6, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4956599
    Abstract: A pair of static induction thyristors, which are coupled in parallel in the opposite bias directions between an AC power source and a load, is turned on by a light signal and is turned off by natural commutation, a light signal or an electric signal. The turn-off light signal is generated within a phase angle of 90.degree. in the time axis around the zero-cross point of the AC voltage from the AC power source.
    Type: Grant
    Filed: January 19, 1989
    Date of Patent: September 11, 1990
    Assignees: Tohoku Electric Manufacturing Co., Ltd., Zaidan Hojin Handotai Kenkyu Sinkokai
    Inventors: Jun-ichi Nishizawa, Takashige Tamamushi, Koji Ishibashi, Kiyoshi Wagatsuma
  • Patent number: 4952996
    Abstract: A semiconductor device comprises a semiconductor substrate of a low impurity concentration, a channel region formed on the substrate and having a low impurity concentration, a source region formed on the channel region and having a high impurity concentration of a conductive type opposite to that of the substrate, and a drain region formed on the channel region and having a high impurity concentration of a conductive type opposite to that of the substrate. The source region and the drain region are arranged along a predetermined direction along the substrate. The semiconductor device further includes an accumulating gate region of a conductive type same as that of the substrate, so formed as to surround either one of the source region and drain region, leaving a part of said channel region sandwiched between the source region and the drain region.
    Type: Grant
    Filed: January 25, 1989
    Date of Patent: August 28, 1990
    Assignees: Zaidan Hojin Handotai Kenkyu Shinkokai, Nikon Corporation
    Inventors: Jun-Ichi Nishizawa, Takashige Tamamushi, Hideo Maeda
  • Patent number: 4939571
    Abstract: An insulated-gate type transistor having a semi-conductor body of a low impurity concentration, a heavily-doped source region of a conductivity type opposite to that of the semiconductor body for supplying charge carriers, a heavily-doped drain region for receiving the carriers supplied from the source region, both of which regions may be provided separately in a main surface of the body, a channel region located between the source and drain regions for the travel of these carriers, an insulated-gate structure inputted with a gate voltage for controlling the travel of those carriers, a semiconductor region formed in the neighborhood of the source region within the body and having a portion located below the source region and another portion extending beyond therefrom toward the drain region and serving to define the channel region and to increase the ratio of the amount of carriers reaching the drain region to the total amount of the carriers supplied from the source region.
    Type: Grant
    Filed: August 4, 1987
    Date of Patent: July 3, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4935798
    Abstract: In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conductivity type opposite to the one conductivity type and provided on the first and second major surfaces, respectively, and a gate region provided in the vicinity of the first main electrode region, there intervenes, between the channel region and the second main electrode region, a thin layer region having the same conductivity type as that of first main electrode region. The provision of this thin layer reegion contributes to allowing a markedly low impurity concentration as well as a decreased thickness of the channel region for a given maximum forward blocking voltage, making it feasible to obtain a high maximum forward blocking voltage and a high switching speed.
    Type: Grant
    Filed: May 8, 1987
    Date of Patent: June 19, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4917757
    Abstract: In a method of performing a solution growth of a ZnSe crystal using Se as a solvent and relying on the temperature difference technique, the growth is performed under the conditions that the vapor pressure of Zn which is lower than the vapor pressure of Se is applied, under controlled manner, to the solvent during the growth process, in which the value of the Zn vapor pressure is held constant at 7.2 atm. .+-.30%, whereby a ZnSe crystal having a good crystal perfection is obtained.
    Type: Grant
    Filed: February 3, 1988
    Date of Patent: April 17, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4914043
    Abstract: An integrated light-triggered and light-quenched static induction thyristor and fabrication process thereof adapted in such a manner that an integrated SIPT operates in the normal mode in order to enhance current gain, tail current generated at the light-quenching time is reduced in order to enhance turn-off gain, and an buried-gate type of light-triggered static induction thyristor and a photo-darlington circuit composed of a first and second static induction phototransistors are integrated on a high-resistivity substrate in order to permit manufacturing said thyristor compact as a whole in facilitated processes.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: April 3, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Takashige Tamamushi, Ken-ichi Nonaka
  • Patent number: 4909998
    Abstract: In performing a solution growth of a Group II-VI compound semiconductor crystal by relying on the temperature difference technique under controlled vapor pressure on a solution growth apparatus having a recrystallizing zone, a source crystal supply zone and a vapor pressure controlling zone enclosed in a growth quartz tube and placed under different temperatures for the respective zones, wherein a heat sink is provided at the bottom end portion of the recrystallizing zone to cause a thermal flow to pass therethrough to the outside of the whole apparatus to insure that a single crystal will grow from this bottom end portion of the zone. The quartz tube may be enclosed in a pressure-resistant tube to apply a pressure to the growth quartz tube externally thereof to avoid its destruction to enable the growth to be performed at a high temperature to obtain a high growth rate. Thus, a large size crystal having a good crystal perfection can be grown.
    Type: Grant
    Filed: May 9, 1989
    Date of Patent: March 20, 1990
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4903938
    Abstract: Disclosed is a micro gas flow rate control valve which is used in semi-conductor producing system operated under a high vacuum or various apparatus for analysis. The valve uses combination of a flat surface valve tip and a flat surface valve seat of cylindrical shape, and is capable of controlling minute flow and durable even used under severe conditions of high pressure differences and large temperature changes to have stable performance. Also enclosed is a metal-ceramics sealing mechanism suitable for the above valve. The sealing mechanism uses, in addition to a sealing member made of a soft metal, a seal assisting member, and durable under the conditions of repeated temperature changes.
    Type: Grant
    Filed: April 11, 1988
    Date of Patent: February 27, 1990
    Assignee: JGC Corp.
    Inventors: Jun-ichi Nishizawa, Shinzo Kasai, Tetsuo Okada, Mitsuhiko Dohzono
  • Patent number: 4891682
    Abstract: A solid state image pick-up device having a number of static induction transistor image sensors arranged in a matrix form, each static induction image sensor includes a drain region formed by an n+ substrate connected to the earth potential, a channel region formed by an n.sup.- epitaxial layer grown on the substrate, a ring-shaped p+ gate region formed in a surface of the epitaxial layer, an n+ source region formed in a part of the surface of the epitaxial layer surrounded by the ring-shaped gate region and a p+ overflow drain region formed in the surface of the substrate underneath the gate region. By adjusting a time duration of a shutter control signal having a positive voltage applied to the overflow drain region, a time period during which photocarriers, i.e. electrons are flown into the gate region and stored therein, can be controlled at will, and an electronic shutter function can be achieved.
    Type: Grant
    Filed: December 1, 1983
    Date of Patent: January 2, 1990
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Atsushi Yusa, Hidetoshi Yamada, Takashi Mizusaki, Jun-ichi Nishizawa, Takashige Tamamushi
  • Patent number: 4876580
    Abstract: A tunnel injection controlling type semiconductor device comprising a source semiconductor region having a certain conductivity type for supplying carriers, a drain semiconductor region for receiving the carriers, and a gate electrode for controlling the flow of these carriers. A highly-doped semiconductor region having a conductivity type opposite to that of the source semiconductor region is provided in contact with the source region or contained locally in the source region to cause tunnel injection of carriers. The potential level of this highly-doped region is varied by virtue of the static induction effect exerted by the voltage applied to the gate electrode which is provided at a site close to but separate from the highly-doped region, and to the drain semiconductor region.
    Type: Grant
    Filed: April 27, 1987
    Date of Patent: October 24, 1989
    Assignee: Zaiden Hojin Handotai Kenkyu Shinkokai
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4872044
    Abstract: In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conductivity type opposite to the one conductivity type and provided on the first and second major surfaces, respectively, and a gate region provided in the vicinity of the first main electrode region, there intervenes, between the channel region and the second main electrode region, a thin layer region having the same conductivity type as that of first main electrode region. The provision of this thin layer region contributes to allowing a markedly low impurity concentration as well as a decreased thickness of the channel region for a given maximum forward blocking voltage, making it feasible to obtain a high maximum forward blocking voltage and a high switching speed.
    Type: Grant
    Filed: May 6, 1987
    Date of Patent: October 3, 1989
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi
  • Patent number: 4870028
    Abstract: A double gate static induction thyristor comprises an n.sup.- semiconductor substrate having first and second principal surfaces opposite to each other. An n.sup.- epitaxial semiconductor layer is formed on the first principal surface of the substrate, and a p.sup.- epitaxial semiconductor layer is formed on the second principal surface of the substrate. A cathode electrode is deposited on the surface of the n.sup.- epitaxial layer, and an anode electrode is deposited on the surface of the p.sup.- epitaxial layer. In addition, a first gate electrode is formed on the first principal surface of the substrate, and a second gate electrode is formed on the second principal surface of the substrate.
    Type: Grant
    Filed: March 13, 1989
    Date of Patent: September 26, 1989
    Assignee: Mitsubishi Electric Corporation
    Inventors: Jun-ichi Nishizawa, Hisao Kondoh
  • Patent number: 4866500
    Abstract: An integrated light-triggered and light-quenched static induction thyristor and fabrication process thereof adapted in such a manner that an integrated SIPT operates in the normal mode in order to enhance current gain, tail current generated at the light-quenching time is reduced in order to enhance turn-off gain, and a buried-gate type of light-triggered static induction thyristor and a photo-darlington circuit composed of a first and second static induction phototransistors are integrated on a high-resistivity substrate in order to permit manufacturing said thyristor compact as a whole in facilitated processes.
    Type: Grant
    Filed: September 23, 1987
    Date of Patent: September 12, 1989
    Assignee: Zaidan Hojin Handotai Kankyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Takashige Tamamushi, Ken-ichi Nonaka
  • Patent number: 4841350
    Abstract: In a photothyristor provided with a cathode, a gate and an anode, the impurity densities of gate (base) portions 20 and 21 are made unequal to each other. The minority carriers are stored in the high impurity density regions 20, the majority carriers are permitted to readily pass through the low impurity density regions 21, and the high and low impurity density regions are electrically coupled together. This thyristor is extremely high in sensitivity and high-speed in operation.
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: June 20, 1989
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4837608
    Abstract: A double gate static induction thyristor comprises an n.sup.- semiconductor substrate having first and second principal surfaces opposite to each other. An n.sup.- epitaxial semiconductor layer is formed on the first principal surface of the substrate, and a p.sup.- epitaxial semiconductor layer is formed on the second principal surface of the substrate. A cathode electrode is deposited on the surface of the n.sup.- epitaxial layer, and an anode electrode is deposited on the surface of the p.sup.- epitaxial layer. In addition, a first gate electrode is formed on the first principal surface of the substrate, and a second gate electrode is formed on the second principal surface of the substrate.
    Type: Grant
    Filed: July 14, 1988
    Date of Patent: June 6, 1989
    Assignee: Mitsubishi Electric Corporation
    Inventors: Jun-ichi Nishizawa, Hisao Kondoh
  • Patent number: 4819058
    Abstract: A method of manufacturing a semiconductor device by the use of a Group II-VI compound semiconductor crystal prepared by liquid growth method using a temperature difference technique under controlled vapor pressure of the crystal-constituting Group VI element. Thus, the concentration of vacancies and other defects acting as donor is reduced as compared with the concentration of the p type impurity to be introduced. This invention is suitable for producing light-emitting diodes emitting a light of short-wave lengths.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: April 4, 1989
    Inventor: Jun-ichi Nishizawa
  • Patent number: 4814839
    Abstract: An insulated-gate static induction transistor is formed by establishing a potential barrier in a semiconductor region of one conductivity type between the source and the drain regions of the other conductivity type. The height of the potential barrier should be sensitive to the drain voltage as well as to the gate voltage. Therefore, the semiconductor region should have a low impurity concentration and short length. The potential barrier can be established by non-uniformalizing the field effect of the gate voltage in the semiconductor region and/or by the built-in potential between the source region and the semiconductor region.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: March 21, 1989
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Tadahiro Ohmi