Patents by Inventor Jun-Kyu Lee

Jun-Kyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220183145
    Abstract: The present invention relates to an electrical device including a printed circuit board (PCB) accommodated in a case, and more particularly, to an air-pocket prevention PCB, an air-pocket prevention PCB module, an electrical device including the same, and a manufacturing method of an electrical device including the same with improved fluidity of a resin material so that air pockets that may occur when the case is filled with the resin material are easily discharged and the resin material may be evenly filled inside the case.
    Type: Application
    Filed: October 13, 2021
    Publication date: June 9, 2022
    Inventors: Jun Kyu Lee, Jeong Man Han, Su Young Kim, Yong Woo Kang, Sang Keun Ji, Dong Kyun Ryu
  • Publication number: 20220183161
    Abstract: The present invention relates to an electrical device including a printed circuit board (PCB) module accommodated in a case, and more particularly, to an electrical device having a heat dissipation structure using a filler that reduces heat generation outside a case while increasing a heat dissipation efficiency of a PCB module by using the filler filled in the case, and a manufacturing method of the same.
    Type: Application
    Filed: August 10, 2021
    Publication date: June 9, 2022
    Inventors: Jun Kyu Lee, Jeong Man Han, Su Young Kim, Yong Woo Kang, Sang Keun Ji, Dong Kyun Ryu
  • Publication number: 20220173560
    Abstract: Provided are an electric appliance and a method of manufacturing the same, the electric appliance having a smaller size and a reduced overall weight by preventing a fluid from flowing into a space unrelated to a heating component in a state where the fluid fills its case. The electric appliance includes: a case including a first space and a second space communicated to each other; a first component disposed in the first space; a second component disposed in the second space; a connection portion electrically connecting the first component and the second component to each other; and a potting pattern including a resin material and formed in the first space.
    Type: Application
    Filed: November 18, 2021
    Publication date: June 2, 2022
    Inventors: Young Jun Jang, Hyun Su Kim, Jun Kyu Lee, Pill Ju Kim, Sang Keun Ji, Dong Kyun Ryu
  • Publication number: 20220173561
    Abstract: Provided are an electric appliance and a method of manufacturing the same, the electric appliance having a smaller size and a reduced overall weight by preventing a fluid from flowing into a space unrelated to a heating component in a state where the fluid fills its case. The electric appliance includes: a case including a first space and a second space communicated to each other; a first component disposed in the first space; a second component disposed in the second space; a connection portion electrically connecting the first component and the second component to each other; and a potting pattern including a resin material and formed in the first space.
    Type: Application
    Filed: November 18, 2021
    Publication date: June 2, 2022
    Inventors: Young Jun Jang, Hyun Su Kim, Jun Kyu Lee, Pill Ju Kim, Sang Keun Ji, Dong Kyun Ryu
  • Patent number: 11264330
    Abstract: Disclosed are a chip package capable of improving the strength of a package and simplifying a manufacturing process and a manufacturing method therefor. This invention may improve the durability of the package by further forming a reinforcing layer on a chip by using an adhesive layer and molding the chip and the reinforcing layer so as to be integrated by using a molding layer. Also, the strength of the package may be improved by having a structure in which solder balls are formed between a base substrate and a re-wiring layer and integrated with the molding layer, and a wiring layer may be formed directly on the molding layer by using polyimide (PI) as the molding layer without using a separate insulating layer formed on the molding layer as in the conventional art.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: March 1, 2022
    Inventors: Yongtae Kwon, Eung Ju Lee, Yong Woon Yeo, Yun Mook Park, Hyo Young Kim, Jun Kyu Lee, Seok Hwi Cheon
  • Publication number: 20210398869
    Abstract: A semiconductor package includes an upper structure including a semiconductor chip and a first molding layer for molding the semiconductor chip, a lower structure provided on the upper structure, the lower structure including a conductive post and a second molding layer for molding the conductive post, and a redistribution structure provided between the upper structure and the lower structure, the redistribution structure including a wiring pattern for electrically connecting a pad of the semiconductor chip to the conductive post, in which a thermal expansion coefficient of the second molding layer is different from a thermal expansion coefficient of the first molding layer.
    Type: Application
    Filed: October 17, 2019
    Publication date: December 23, 2021
    Applicant: NEPES CO., LTD.
    Inventors: Su Yun KIM, Dong Hoon OH, Yong Tae KWON, Jun Kyu LEE, Kyeong Rok SHIN, Yong Woon YEO
  • Publication number: 20210343656
    Abstract: A semiconductor package includes a semiconductor chip including a chip pad, a first insulating layer provided on the semiconductor chip and including a first via hole, a first wiring pattern provided on the first insulating layer and connected to the chip pad through the first via hole of the first insulating layer, a second insulating layer provided on the first insulating layer and the first wiring pattern and including a second via hole, and a second wiring pattern provided on the second insulating layer and connected to the first wiring pattern through the second via hole of the second insulating layer, wherein the first insulating layer includes a first upper surface in contact with the second insulating layer and a first lower surface opposite to the first upper surface, and the first upper surface of the first insulating layer has surface roughness greater that the first lower surface of the first insulating layer.
    Type: Application
    Filed: September 26, 2019
    Publication date: November 4, 2021
    Applicant: Nepes Co., Ltd.
    Inventors: Yong Tae KWON, Jun Kyu Lee, Dong Hoon OH, Su Yun KIM, Kyeong Rok SHIN
  • Patent number: 11065859
    Abstract: A solar cell module disassembling device is disclosed. The device of present invention comprises a frame unit, wherein a laminated panel having a first panel and a second panel is mounted on the frame unit, and wherein the first and second panels are stacked and bonded; a guide module, being elongated in a forward and backward direction; a scraper unit, being movably coupled to the guide module, having a blade module, wherein the blade module moves in the forward and backward direction and presses the laminated panel and disassembles the laminated panel; and a transfer unit, being coupled to the scraper unit, delivering a driving force to the scraper unit, transferring the scraper unit.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: July 20, 2021
    Assignee: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Jin Seok Lee, Young Soo Ahn, Gi Hwan Kang, Jun Kyu Lee
  • Publication number: 20210193602
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a lower structure including a semiconductor chip having a chip terminal; an external connection terminal connecting the semiconductor chip to an external device, and an intermediate connection structure including an upper surface and a lower surface opposite to the upper surface, and positioned between the lower structure and the external connection terminal.
    Type: Application
    Filed: December 15, 2020
    Publication date: June 24, 2021
    Applicant: Nepes CO., LTD.
    Inventors: Jun Kyu LEE, Su Yun Kim, Dong Hoon OH, Yong Tae KWON, Ju Hyun NAM
  • Publication number: 20210151379
    Abstract: Disclosed are a chip package capable of improving the strength of a package and simplifying a manufacturing process and a manufacturing method therefor. This invention may improve the durability of the package by further forming a reinforcing layer on a chip by using an adhesive layer and molding the chip and the reinforcing layer so as to be integrated by using a molding layer. Also, the strength of the package may be improved by having a structure in which solder balls are formed between a base substrate and a re-wiring layer and integrated with the molding layer, and a wiring layer may be formed directly on the molding layer by using polyimide (PI) as the molding layer without using a separate insulating layer formed on the molding layer as in the conventional art.
    Type: Application
    Filed: August 3, 2018
    Publication date: May 20, 2021
    Inventors: Yongtae KWON, Eung Ju LEE, Yong Woon YEO, Yun Mook PARK, Hyo Young KIM, Jun Kyu LEE, Seok Hwi CHEON
  • Patent number: 11011502
    Abstract: A semiconductor package includes a first package including a first semiconductor chip, a first encapsulation layer that covers the first semiconductor chip, and a first redistribution pattern connected to pads of the first semiconductor chip and a second package on the first package, the second package including a second semiconductor chip, a second encapsulation layer that covers the second semiconductor chip, and a second redistribution pattern connected to pads of the second semiconductor chip. The first redistribution pattern is connected to the second redistribution pattern through the first encapsulation layer.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: May 18, 2021
    Assignee: Nepes Co., Ltd.
    Inventor: Jun Kyu Lee
  • Patent number: 10957654
    Abstract: Provided are a semiconductor package and a method of manufacturing the same, the semiconductor package including an interconnection part including an insulation layer and an interconnection layer, a semiconductor chip disposed on the interconnection part and electrically connected to the interconnection layer through a bonding pad, and an EMI shielding part connected to the interconnection layer while covering the semiconductor chip and the interconnection part.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 23, 2021
    Assignee: NEPES CO., LTD.
    Inventors: Jun-Kyu Lee, Jaecheon Lee
  • Publication number: 20210062232
    Abstract: The present disclosure relates to a mutant microorganism in which a glycerol catabolic pathway and a 1,3-PDO biosynthetic pathway are introduced into a microorganism incapable of using glycerol as a carbon source, and a method of producing 1,3-PDO using the same. According to the present disclosure, it is possible to produce 1,3-PDO while growing a mutant microorganism having 1,3-PDO production ability by using the inexpensive raw material glycerol as a single carbon source. Thus, the present disclosure is useful for the economical production of 1,3-PDO.
    Type: Application
    Filed: January 15, 2019
    Publication date: March 4, 2021
    Inventors: Sang Yup LEE, Jae Sung CHO, Je Woong KIM, Yoo Sung KO, Cindy Pricilia Surya PRABOWO, Taehee HAN, Euiduk KIM, Jae Won CHOI, Changhee CHO, Jun Kyu LEE
  • Patent number: 10880610
    Abstract: The present disclosure relates to technology for a sensor network, machine to machine (M2M) communication, machine type communication (MTC), and internet of things (IoT). The present disclosure may be applied to intelligent services (e.g., smart homes, smart buildings, smart cities, smart cars or connected cars, health care, digital education, retail, and security and safety-related services) based on the technology. Provided are a method, an apparatus and a recording medium in which a terminal receives additional content corresponding to a captured image from a server by using a wireless communication device, and provides the additional content, based on a signal detected by a user interaction region.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: December 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-chang Lee, Se-won Moon, Jun-kyu Lee, Hyun-kwon Chung
  • Publication number: 20200357564
    Abstract: A transformer includes: an upper primary substrate (110) which is formed by stacking a plurality of dielectric substrates, each substrate being provided with spiral conductive patterns; a lower secondary substrate (120) which is formed by stacking a plurality of dielectric substrates, each substrate being provided with spiral conductive patterns, in which the lower secondary substrate is positioned below the upper primary substrate (110) in such a way that the lower secondary substrate comes into contact with the upper primary substrate (110) or is spaced apart from the upper primary substrate (110); and a secondary coil element (200) of a planar shape to produce an induced current by a current applied to the upper primary substrate (110) and the lower primary substrate (120).
    Type: Application
    Filed: November 27, 2019
    Publication date: November 12, 2020
    Inventors: Eun Sik KIM, Jun Kyu Lee, Changyong Kwon, Dong-kyun Ryu, Sang-keun Ji, Taeksoo Han, Jung Soo Lee
  • Patent number: 10799955
    Abstract: In a method of manufacturing metal powders in a continuous type, metal is heated at a temperature greater than a melting point to form a liquid phase metal, and the liquid phase metal and an emulsion carrier, which is emulsified without reacting with the liquid phase metal, are supplied into a container, and the liquid phase metal and the emulsion carrier are emulsified through Taylor flow to form an emulsion solution. The emulsion solution is discharged from the container, and then, the emulsion solution is cooled at a temperature smaller than the melting point to selectively solidifying the liquid phase metal in the emulsion solution to form the metal powders.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: October 13, 2020
    Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Woo Young Yoon, Jun Kyu Lee, Sung Man Cho
  • Publication number: 20200273830
    Abstract: A semiconductor package according to an embodiment includes a semiconductor chip having a first surface in which a chip pad is formed, a first insulating layer arranged on the first surface of the semiconductor chip and including a first filler, a first conductive via electrically connected to the chip pad and formed to penetrate the first insulating layer, a redistribution pattern electrically connected to the first conductive via and buried in the first insulating layer, a second insulating layer contacting the redistribution pattern on the first insulating layer and including a second filler, a second conductive via electrically connected to the redistribution pattern and formed to penetrate the second insulating layer, an under bump material (UBM) electrically connected to the second conductive via and buried in the second insulating layer, and an external connection terminal electrically connected to the UBM.
    Type: Application
    Filed: February 17, 2020
    Publication date: August 27, 2020
    Applicant: Nepes Co., Ltd.
    Inventors: Yong Tae Kwon, Jun Kyu LEE, Kyeong Rok SHIN
  • Publication number: 20200247106
    Abstract: A solar cell module disassembling device is disclosed. The device of present invention comprises a frame unit, wherein a laminated panel having a first panel and a second panel is mounted on the frame unit, and wherein the first and second panels are stacked and bonded; a guide module, being elongated in a forward and backward direction; a scraper unit, being movably coupled to the guide module, having a blade module, wherein the blade module moves in the forward and backward direction and presses the laminated panel and disassembles the laminated panel; and a transfer unit, being coupled to the scraper unit, delivering a driving force to the scraper unit, transferring the scraper unit.
    Type: Application
    Filed: August 12, 2019
    Publication date: August 6, 2020
    Applicant: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Jin Seok Lee, Young Soo Ahn, Gi Hwan Kang, Jun Kyu Lee
  • Patent number: 10468895
    Abstract: Provided herein is a charger with improved radiation function capable of lowering its surface temperature to prevent the surface temperature from increasing excessively, the charger according to one aspect of the present disclosure including a printed circuit board on which circuit elements are mounted; an inner case formed in a hollow case shape of which both surfaces are open, and where the printed circuit board is arranged inside; a radiation member formed to cover an outer surface of the inner case to release heat generated in the circuit elements of the printed circuit board; an outer case formed to encompass the radiation member and provided with one open surface; a cover assembled in the outer case and configured to close the one open surface of the outer case; and a terminal coupled to one surface of the outer case, and configured to enable electricity to be supplied to the charger when inserted into a consent.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: November 5, 2019
    Assignee: SOLUM CO., LTD.
    Inventors: Young-seung Noh, Hyun-su Kim, Soon-joung Yio, Young-joo Kim, Jun-kyu Lee
  • Patent number: 10381312
    Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same. The semiconductor package according to embodiments of the present disclosure includes a wiring including a plurality of layers including an insulating layer and a wiring layer, a semiconductor chip mounted on the wiring and electrically connected to the wiring layer through a bonding pad, a cover member configured to cover side surfaces of the semiconductor chip and the wiring and be in contact with at least one wiring layer, and an encapsulant configured to seal the cover member. Accordingly, the cover member covers the semiconductor chip and is in contact with the wiring formed under the semiconductor chip, thereby reducing electromagnetic interference, minimizing noise between operations of the semiconductor package, and improving a signal speed.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: August 13, 2019
    Assignee: NEPES CO., LTD.
    Inventors: Il-Hwan Kim, Jun-Kyu Lee, Min-A Yoon, Dong-Hoon Oh, Tae-Won Kim