Patents by Inventor Jung-Huei Peng

Jung-Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Publication number: 20240085678
    Abstract: Various embodiments of the present disclosure are directed towards a camera module comprising flat lenses. Flat lenses have reduced thicknesses compared to other types of lenses, whereby the camera module may have a small size and camera bumps may be omitted or reduced in size on cell phones and the like incorporating the camera module. The flat lenses are configured to focus visible light into a beam of white light, split the beam into sub-beams of red, green, and blue light, and guide the sub-beams respectively to separate image sensors for red, green, and blue light. The image sensors generate images for corresponding colors and the images are combined into a full-color image. Optically splitting the beam into the sub-beams and using separate image sensors for the sub-beams allows color filters to be omitted and smaller pixel sensors. This, in turn, allows higher quality imaging.
    Type: Application
    Filed: May 8, 2023
    Publication date: March 14, 2024
    Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu, Tsun-Hsu Chen
  • Publication number: 20240036294
    Abstract: An optical device includes a substrate, a first electrode, a second electrode, and a first lens. The first electrode and the second electrode are over the substrate and configured to generate a first electric field. The first lens is between the first electrode and the second electrode and has a focal length that varies in response to the first electric field applied to the first lens.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: WEI-LIN CHEN, CHING-CHUNG SU, JUNG-HUEI PENG, CHUN-WEN CHENG, CHUN-HAO CHOU, KUO-CHENG LEE
  • Publication number: 20230365395
    Abstract: The present disclosure provides a structure and method of fabricating the structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
  • Publication number: 20230317753
    Abstract: Optical modules and methods of forming the same are provided. In an embodiment, an exemplary method includes forming multiple first optical elements over a first wafer, forming multiple second optical elements over a second wafer, forming multiple third optical elements over a third wafer, aligning the first wafer with the second wafer such that, upon the aligning of the first wafer with the second wafer, each first optical element is vertically overlapped with a corresponding second optical element. The method also includes bonding the first wafer with the second wafer to form a first bonded structure, aligning the second wafer with the third wafer such that, and upon bonding the second wafer of the first bonded structure to the third wafer, where upon the aligning of the second wafer with the third wafer, each second optical element is vertically overlapped with a corresponding third optical element.
    Type: Application
    Filed: August 31, 2022
    Publication date: October 5, 2023
    Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu
  • Patent number: 11767216
    Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
  • Patent number: 11678133
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-Wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • Patent number: 11505454
    Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kang-Che Huang, Yi-Chien Wu, Shiang-Chi Lin, Jung-Huei Peng, Chun-Wen Cheng
  • Publication number: 20220204340
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Application
    Filed: March 16, 2022
    Publication date: June 30, 2022
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Publication number: 20220184614
    Abstract: A flow cell includes: a first substrate; a second substrate; a first resin layer disposed over an inner surface of the first substrate; a second resin layer disposed over an inner surface of the second substrate; a first plurality of biological capture sites located at the first resin layer; a second plurality of biological capture sites located at the second resin layer; and a polymer layer interposed between the first resin layer and the second resin layer, such that the first substrate is attached to the second substrate via at least the first resin layer, the polymer layer, and the second resin layer, wherein the polymer layer defines a plurality of microfluidic channels that extend through polymer layer.
    Type: Application
    Filed: February 28, 2022
    Publication date: June 16, 2022
    Applicant: Illumina, Inc.
    Inventors: Shang-Ying TSAI, Li-Min Hung, Jung-Huei Peng, Shane Bowen, Hui Han, Danny Chan, Sang Park
  • Patent number: 11312623
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 11298697
    Abstract: A flow cell includes: a first substrate; a second substrate; a first resin layer disposed over an inner surface of the first substrate; a second resin layer disposed over an inner surface of the second substrate; a first plurality of biological capture sites located at the first resin layer; a second plurality of biological capture sites located at the second resin layer; and a polymer layer interposed between the first resin layer and the second resin layer, such that the first substrate is attached to the second substrate via at least the first resin layer, the polymer layer, and the second resin layer, wherein the polymer layer defines a plurality of microfluidic channels that extend through polymer layer.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 12, 2022
    Assignee: ILLUMINA, INC.
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng, Shane Bowen, Hui Han, Danny Chan, Sang Park
  • Patent number: 11279615
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11148936
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a metallization layer over the substrate, and a sensing structure over the metallization layer. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier in proximity to a top surface of the outgassing layer, the patterned outgassing barrier exposing a portion of the outgassing layer, and an electrode over the patterned outgassing barrier. The method for manufacturing the semiconductor device is also provided.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: October 19, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 11130670
    Abstract: A device includes a substrate, a routing conductive line over the substrate, a dielectric layer over the routing conductive line, and an etch stop layer over the dielectric layer. A Micro-Electro-Mechanical System (MEMS) device has a portion over the etch stop layer. A contact plug penetrates through the etch stop layer and the dielectric layer. The contact plug connects the portion of the MEMS device to the routing conductive line. An escort ring is disposed over the etch stop layer and under the MEMS device, wherein the escort ring encircles the contact plug.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: September 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Hung-Hua Lin, Hsin-Ting Huang, Lung Yuan Pan, Jung-Huei Peng, Yao-Te Huang
  • Patent number: 11117796
    Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 11104129
    Abstract: MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 31, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chun-Ren Cheng, Jiou-Kang Lee, Shang-Ying Tsai, Ting-Hau Wu
  • Patent number: 11027310
    Abstract: The present disclosure relates to a method of depositing a fluid onto a substrate. In some embodiments, the method may be performed by mounting a substrate to a micro-fluidic probe card, so that the substrate abuts a cavity within the micro-fluidic probe card that is in communication with a fluid inlet and a fluid outlet. A first fluidic chemical is selectively introduced into the cavity via the fluid inlet of the micro-fluidic probe card.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: June 8, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • Publication number: 20210087056
    Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 25, 2021
    Inventors: KANG-CHE HUANG, YI-CHIEN WU, SHIANG-CHI LIN, JUNG-HUEI PENG, CHUN-WEN CHENG
  • Publication number: 20210053816
    Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.
    Type: Application
    Filed: September 25, 2020
    Publication date: February 25, 2021
    Inventors: Yuan-Chih HSIEH, Hsing-Lien LIN, Jung-Huei PENG, Yi-Chien WU