Abstract: The present invention relates to a camera module, and the present invention may comprise: a lens; a heating layer positioned on the lens so as to generate heat when power is supplied thereto; and a heating wire, which is positioned on the surface of the lens or of the heating layer, which generates heat when a current is supplied thereto from an external power supply, and which is electrically connected to the heating layer. The present invention comprises a heating wire, besides the heating layer that comprises a conductive material, and thus can reduce the time taken to supply a heating body with a current, and the reduced heating time accordingly enables rapid heating.

Abstract: The present disclosure relates to a method of controlling a plasma processing apparatus, and a plasma processing apparatus for performing the method. According to one embodiment of the present disclosure, a method of controlling a plasma processing apparatus includes supplying power having a sine wave from a high-frequency power source to a lower electrode to generate a plasma; and supplying power from the high-frequency power source to the lower electrode, to control an ion in the generated plasma, and when a voltage of a wafer disposed on the lower electrode has a negative peak value in a phase region, inputting a negative DC voltage to a focusing ring by a DC power source.

Abstract: A single poly non-volatile memory device is provided. The single poly non-volatile memory device is formed in a semiconductor substrate, and includes a sensing transistor, a selection transistor, and a capacitor, wherein a thickness of a selection gate insulating film is formed to be thicker than a thickness of a sensing gate insulating film, wherein a thickness of a control gate insulating film of the capacitor is formed to be the same, or greater than, a thickness of the sensing gate insulating film, and wherein the sensing gate of the sensing transistor and the control gate of the capacitor are physically and electrically connected to each other.

Abstract: An apparatus and system for treating a substrate includes a chamber having an inner space, a support unit in the inner space and configured to support and rotate the substrate, and first and second laser irradiation unit configured to irradiate first and second laser beams onto the substrate. The first laser irradiation unit includes a first laser light source configured to generate the first laser beam, and a first wavelength adjusting member configured to adjust a range of a wavelength of the first laser beam received from the first laser light source. The second laser beam, and a second wavelength adjusting member configured to adjust a range of a wavelength of the second laser beam received from the second laser light source.

Abstract: A substrate treating apparatus includes a chamber having a treatment space, a first power supply that is connected to a first component provided in the treatment space and transmits power having a first frequency to the first component, a second power supply that is provided in the treatment space, is connected to a second component different from the first component, and transmits power having a second frequency smaller than the first frequency to the second component, and a coupling blocking structure installed on a power line connected to the second power supply and the second component, wherein the coupling blocking structure is electrically connected to the power line and includes a conductive line having a coil shape.

Abstract: A single poly non-volatile memory device is provided. The single poly non-volatile memory device is formed in a semiconductor substrate, and includes a sensing transistor, a selection transistor, and a capacitor, wherein a thickness of a selection gate insulating film is formed to be thicker than a thickness of a sensing gate insulating film, wherein a thickness of a control gate insulating film of the capacitor is formed to be the same, or greater than, a thickness of the sensing gate insulating film, and wherein the sensing gate of the sensing transistor and the control gate of the capacitor are physically and electrically connected to each other.

Abstract: Provided is a manufacturing method of a stainless steel sheet having etching patterns. The method includes: coating a coating composition on a stainless steel sheet to form a coating layer; and forming a matte coated film layer, having an etching effect, on the coating layer. The coating composition comprises: 10 to 30 wt% of a silane-based compound, 0.5 to 6 wt% of an organic acid, 0.1 to 3 wt% of a vanadium compound, 0.1 to 3 wt% of a magnesium compound, and a remainder of a solvent.

Abstract: A nonvolatile memory device and method for fabricating the same are provided. The nonvolatile memory device comprising: a substrate; a mold structure including a first insulating pattern and a plurality of gate electrodes alternately stacked in a first direction on the substrate; and a word line cut region which extends in a second direction different from the first direction and cuts the mold structure, wherein the word line cut region includes a common source line, and the common source line includes a second insulating pattern extending in the second direction, and a conductive pattern extending in the second direction and being in contact with the second insulating pattern and a cross-section in the second direction.

Abstract: Disclosed is a method for removing a film from a substrate by irradiating a plurality of unit pulse laser beams to an edge region of the substrate. The method includes a first irradiation operation for irradiating a plurality of unit pulse laser beams onto the substrate while the substrate is rotating, and a second irradiation operation for irradiating a plurality of unit pulse laser beams to regions of the substrate onto which the unit pulse laser beams are not irradiated in the first irradiation operation.

Abstract: A semiconductor device is provided. The semiconductor device includes a first region having a first gate structure disposed on a substrate and a second region having a second gate structure disposed on the substrate, a hard mask formed on the substrate, the first gate structure, and the second gate structure, a deep trench formed in the substrate between the first region and the second region, and formed to penetrate the hard mask to reach an inside of the substrate, and a planarized gap-fill insulating layer formed on the second gate structure and formed inside the deep trench. A topmost surface of the planarized gap-fill insulating layer and a topmost surface of the hard mask are coplanar.

Abstract: Provided is a thermoelectric cooling device comprising: a thermoelectric module; a heat sink having a body, which has on one side a contact surface coming into contact with a heating side of the thermoelectric module, and a plurality of heat dissipation fins, and emitting the heat transferred from the heating side of the thermoelectric module; a heat pipe coupled to a mounting groove which is formed on the contact surface of the heat sink, and for transferring heat by means of a working fluid stored therein; and a cooling fan for forming the airflow to the heat sink, wherein the heat pipe comprises a plurality of corner-extension heat pipes extending to a corner area of the heat sink from the central part of the heat sink on which the thermoelectric module is installed, and the shape of the mounting groove corresponds to the shape of the corner-extension heat pipes.

Abstract: A semiconductor device include a nonvolatile memory device, including a first well region formed in a substrate, a tunneling gate insulator formed on the first well region, a floating gate formed on the tunneling gate insulator, a control gate insulator formed on the substrate, a control gate formed on the control gate insulator, and a first source region and a first drain region formed on opposite sides of the control gate, respectively, and a first logic device, including a first logic well region formed in the substrate, a first logic gate insulator formed on the first logic well region, a first logic gate formed on the first logic gate insulator, wherein the first logic gate comprises substantially a same material as a material of the control gate of the nonvolatile memory device.

Abstract: An atelocollagen according to an embodiment is characterized in that, when analyzed by high-performance liquid chromatography (HPLC), a peak area (S?) for a ? chain is larger than a second peak area for an ? chain (S?2) so that, when a physiologically active material is loaded therein, the atelocollagen may decrease rapid initial release of the physiologically active material or may control reduction in effects of the physiologically active material due to too slow initial release. Further, the atelocollagen of the present invention may exhibit excellent cancer metastasis inhibitory effects.

Abstract: One aspect according to the present disclosure relates to a novel nucleic acid ligand which is a new class of nucleic acid compound, the existence of which was considered impossible in the prior art. The novel nucleic acid ligand has specific binding affinity with respect to at least two different targets having three-dimensional structures, and the binding sites for the at least two targets are formed in or from a single nucleic acid ligand. The novel nucleic acid ligand according the present disclosure can simultaneously solve several problems of existing aptamers that the prior art could not solve. One aspect according to the present disclosure relates to a novel screening method for identifying the above-mentioned novel nucleic acid ligand. The novel screening method uses a step for sequentially contacting at least two different targets having three-dimensional structures to screen a novel nucleic acid ligand that was previously thought impossible.

Abstract: A semiconductor device includes a cell substrate including a cell array region and an extension region surrounding the cell array region, a mold structure including gate electrodes sequentially stacked on the cell substrate, channel structures disposed on the cell array region and intersecting the gate electrodes, a bit-line connected to at least some of the channel structures, a block isolation region cutting the mold structure, a source layer disposed between the cell substrate and the mold structure and connected to a side surface of each of the channel structures, and a support layer disposed between the source layer and the mold structure on upper surfaces of the cell substrate and the source layer. The support layer includes a support structure contacting the upper surface of the cell substrate. The support structure includes a peripheral portion surrounding the cell array region, and a mesh portion disposed on the extension region.

Abstract: A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region.

Abstract: An antenna assembly, which is capable of controlling widely an etching rate in a plasma treatment process, and a plasma processing equipment including the same are provided. The antenna assembly provided to generate plasma includes a feeding line to which a radio frequency (RF) signal may be applied, and a coil member including a plurality of unit coils coupled to the feeding line and spaced apart from each other in a vertical direction at a predetermined gap.

Abstract: An impedance matching circuit, which is provided for quick impedance matching, a power supply apparatus, and a plasma processing equipment including the same are provided. The impedance matching circuit includes a parallel capacitor array connected to a radio frequency (RF) power supply to generate a RF signal, and a series capacitor array connected to the RF power supply in series, wherein the parallel capacitor array or the series capacitor array includes a mechanical vacuum variable capacitor and an electrical switch capacitor module connected to the mechanical vacuum variable capacitor in parallel.

Abstract: Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a chamber providing a space in which a substrate is treated, a support unit supporting the substrate inside the chamber, a laser unit irradiating laser to an edge region of the substrate, a vision unit capturing the edge region of the substrate to measure an offset value of the substrate, and an adjustment unit adjusting an irradiation location of the laser based on the offset value of the substrate.

Abstract: A semiconductor device include a nonvolatile memory device, including a first well region formed in a substrate, a tunneling gate insulator formed on the first well region, a floating gate formed on the tunneling gate insulator, a control gate insulator formed on the substrate, a control gate formed on the control gate insulator, and a first source region and a first drain region formed on opposite sides of the control gate, respectively, and a first logic device, including a first logic well region formed in the substrate, a first logic gate insulator formed on the first logic well region, a first logic gate formed on the first logic gate insulator, wherein the first logic gate comprises substantially a same material as a material of the control gate of the nonvolatile memory device.