Abstract: Disclosed is a method for configuring a bandwidth for supporting a broadband carrier in a communication system. An operation method of a base station comprises the steps of: configuring a first bandwidth part and a second bandwidth part for a terminal; configuring a reserved resource for the first bandwidth part in a resource area in which the first bandwidth part and the second bandwidth part overlap; and performing an operation of transmitting or receiving a second data channel, which is scheduled to the second bandwidth part, together with the terminal by using the reserved resource. Therefore, the performance of the communication system can be improved.

Abstract: A memory erasing method and apparatus for erasing important data of a nonvolatile memory within the apparatus to prevent illegal access using attitude information measured in an inertial measurement sensor and a low power microprocessor regardless of the power supply state of the apparatus. The apparatus includes a power switching circuit unit for selecting one from among an external power source and a battery. An inertial measurement sensor measures attitude information of the memory erasing apparatus, using power supplied from the external power source or the battery. A low power microprocessor erases important data from a memory device in a first manner using power from the external power source, and in a second manner using power from the battery, the first manner being different from the second manner.

Abstract: A memory erasing method and apparatus for erasing important data of a nonvolatile memory within the apparatus to prevent illegal access using attitude information measured in an inertial measurement sensor and a low power microprocessor regardless of the power supply state of the apparatus. The apparatus includes a power switching circuit unit for selecting one from among an external power source and a battery. An inertial measurement sensor measures attitude information of the memory erasing apparatus, using power supplied from the external power source or the battery. A low power microprocessor erases important data from a memory device in a first manner using power from the external power source, and in a second manner using power from the battery, the first manner being different from the second manner.

Abstract: An apparatus and method for verifying the integrity of firmware of an embedded system is provided. The apparatus for verifying the integrity of firmware of an embedded system includes a target integrity code obtainment unit for obtaining a target integrity code of firmware of the embedded system. A source integrity code obtainment unit obtains a source integrity code of source firmware. An integrity determination unit determines whether integrity of the firmware of the embedded system is maintained, by using the target integrity code and the source integrity code.

Abstract: An apparatus and method for verifying the integrity of firmware of an embedded system is provided. The apparatus for verifying the integrity of firmware of an embedded system includes a target integrity code obtainment unit for obtaining a target integrity code of firmware of the embedded system. A source integrity code obtainment unit obtains a source integrity code of source firmware. An integrity determination unit determines whether integrity of the firmware of the embedded system is maintained, by using the target integrity code and the source integrity code.

Abstract: An FPGA apparatus and a method for protecting bitstreams are provided. The FPGA apparatus includes: a key storage unit, which is configured to be accessed only from within the FPGA, and having stored therein the encryption/decryption key and the initial key generated by the random number generator; a setting bitstream storage unit, which is an internal non-volatile memory stored with bitstreams for setting authentication and encryption/decryption; and an authentication and encryption/decryption setting unit, which is configured to call the encryption and decryption key and the initial value stored in the key storage unit to store encrypted bitstreams and authentication codes generated as a result of performing encryption on the bitstreams stored in the setting bitstream storage unit in external non-volatile memory, and verity the integrity of the encrypted bitstreams stored in the external non-volatile memory at the time of designing of the FPGA using the encrypted bitstreams.

Abstract: An FPGA apparatus and a method for protecting bitstreams are provided. The FPGA apparatus includes: a key storage unit, which is configured to be accessed only from within the FPGA, and having stored therein the encryption/decryption key and the initial key generated by the random number generator; a setting bitstream storage unit, which is an internal non-volatile memory stored with bitstreams for setting authentication and encryption/decryption; and an authentication and encryption/decryption setting unit, which is configured to call the encryption and decryption key and the initial value stored in the key storage unit to store encrypted bitstreams and authentication codes generated as a result of performing encryption on the bitstreams stored in the setting bitstream storage unit in external non-volatile memory, and verity the integrity of the encrypted bitstreams stored in the external non-volatile memory at the time of designing of the FPGA using the encrypted bitstreams.

Abstract: An apparatus and method for encrypting a hard disk are provided. The apparatus includes a program management unit, an Internet Protocol (IP) management unit, and an encryption processing unit. The program management unit causes an allowed program or process to be executed based on a result of determination as to whether the program or process to be executed in a host terminal is allowed to gain access. The IP management unit causes data to be transmitted to an allowed destination IP address based on a result of determination as to whether the destination IP address to which the host terminal attempts to transmit the data is allowed to be accessed. The encryption processing unit encrypts and decrypts all data, exchanged between the host terminal and the hard disk by applying an algorithm, selected by a user, to the data.