Patents by Inventor Junichi Hayashi

Junichi Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110103698
    Abstract: In verification of image data of a captured image as to whether it is original one, the verification is possible even for image data subjected to a peripheral illumination correction or an exposure correction. An order information calculation unit selects a pixel set including two or more pixels based on pixel values and information on an image space of image data of a captured image, and calculates an order of magnitude between pixels in the selected pixel set. A verification data producing unit generates verification data used in verification of whether the image data has not been tampered with, based on the calculated order of magnitude. An image output unit outputs the image data and the verification data.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 5, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Junichi Hayashi, Nobuhiro Tagashira, Kazuya Kishi, Yasuhiro Nakamoto, Yoshiharu Imamoto, Jun Tamaru
  • Publication number: 20110090520
    Abstract: An image processing apparatus for generating a print image which can be easily visually recognizable under a particular light source, without using special ink, by utilizing a characteristic of a print medium. A color information holding unit holds first color information and second color information indicating different ink use amounts in a print unit per unit area on a print medium, and a color difference equal to or less than a predetermined value under ordinary light. In accordance with a value of a pixel of binary latent image data delivered from a latent image generator, a discrimination image data generator print-outputs one of the first color information and the second color information as print data with respect to the pixel.
    Type: Application
    Filed: September 28, 2010
    Publication date: April 21, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masanori Yokoi, Koji Harada, Junichi Hayashi
  • Patent number: 7927399
    Abstract: A composition for forming a green body is provided. The composition for forming the green body contains powder constituted of a metallic material and a binder containing a first resin which is decomposable by ozone and a second resin which is also decomposable by ozone but decomposed later than the first resin. The green body formed of the composition is used in producing a brown body, wherein the brown body is produced by first exposing the green body to a high ozone content atmosphere to decompose the first resin and remove the decomposed first resin and then decompose the second resin and remove the decomposed second resin, and then at least once exposing the thus obtained green body to a low ozone content atmosphere whose ozone concentration is lower than an ozone concentration of the high ozone content atmosphere.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: April 19, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Masaaki Sakata, Junichi Hayashi
  • Patent number: 7930276
    Abstract: This invention allows verifying whether or not an original image content has been altered, to specify all edit processes applied to the original image content, and to hold the edited content. To this end, upon inputting a digital content file to be edited, first verification data included in that file is verified. After the content is edited, edit record information for the content is generated. Upon completion of the edit process and outputting the edited content, second verification data is generated based on the verification result of first verification unit, the edit record, and the edited content. The edited content, the edit record, the verification result of the first verification unit, and the second verification data are combined as an edited digital content file, and the combined file is output.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: April 19, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junichi Hayashi
  • Publication number: 20110087835
    Abstract: To include a plurality of core chips to which different pieces of chip information from each other are given in advance. A first refresh command is divided into a plurality of second refresh commands having different timings from each other, and a refresh operation is performed on a core chip for which a count value of the second refresh commands and at least a portion of the chip information match each other. With this configuration, even when the second refresh command is commonly supplied to a plurality of core chips, it is possible to shift a timing for the refresh operation in each of the core chips. Therefore, it is possible to reduce a peak current at the time of the refresh operation.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Homare Sato, Junichi Hayashi
  • Publication number: 20110085397
    Abstract: A semiconductor device includes plural core chips and an interface chip that controls the plural core chips. Each of the plural core chips includes a layer address generating circuit that generates a second chip address by incrementing a value of a first chip address and a layer address comparing circuit that compares a third chip address supplied from the interface chip and the second chip address, and activates a chip selection signal when the third chip address and the second chip address are matched with each other. When a non-used chip signal is in an inactivated state, the layer address generating circuit supplies the second chip address to another core chip, and when the non-used chip signal is in an activated state, the layer address generating circuit supplies the first chip address to another core chip without a change.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 14, 2011
    Applicant: Elpida Memory, Inc.
    Inventors: Homare Sato, Junichi Hayashi
  • Patent number: 7811512
    Abstract: A method for producing a sintered body is provided. The method for producing the sintered body comprising: forming a green body by molding a composition for forming a green body into a specified shape to obtain the green body, the composition comprising powder constituted of a metallic material and a binder containing a first resin which is decomposable by ozone; first debinding the green body by exposing the green body to a high ozone content atmosphere to decompose the first resin and remove the decomposed first resin form the green body to obtain a brown body; exposing the thus obtained brown body at least once to a low ozone content atmosphere whose ozone concentration is lower than an ozone concentration of the high ozone content atmosphere to obtain an intermediate brown body; and sintering the intermediate brown body which has been exposed to the low ozone content atmosphere to obtain the sintered body.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: October 12, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Masaaki Sakata, Junichi Hayashi
  • Publication number: 20100135526
    Abstract: This invention provides a technique of preventing determination of image alteration when digital image data has undergone, e.g., rotation without any substantial change in contents. To do this, an area separation processing unit separates image data into areas. For each of the separated areas, an area feature value calculator calculates an area feature value independent of the coordinate information of the image. An area order sorter sorts the separated areas in accordance with the calculated area feature values. A validation data generation processing unit generates validation data based on the sort result.
    Type: Application
    Filed: November 23, 2009
    Publication date: June 3, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Junichi Hayashi, Yoshiharu Imamoto, Nobuhiro Tagashira, Kazuya Kishi, Yasuhiro Nakamoto, Kazuomi Oishi
  • Patent number: 7706530
    Abstract: It is possible to safely constitute a key management method having an access structure equivalent to the hierarchical key management method with a small amount of calculations. The method includes: a setting step for setting a set (,) of the number of times a one-way hash function is executed for each of the elements of the rank i; a key generation step for generating two separate keys for the elements as the value of the number of times the one-way function has been executed corresponding to the set of the number of times which has been set for the elements of the two original keys for each of the elements; and a key delivery step for delivering the two separate keys for the elements to each of the elements.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: April 27, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuji Suga, Junichi Hayashi
  • Patent number: 7706568
    Abstract: A method is provided that enables verification of whether a component of original image data has been altered at the location at which the component is to be reused without newly generating a signature. More specifically, the method includes inputting first document data including a plurality of components and signature information corresponding to the components, selecting at least one component from among the components, and extracting signature information corresponding to the at least one selected component. The method further includes storing the at least one selected component and the signature information corresponding to the at least one selected component in a memory, and generating second document data by pasting the at least one stored component and the stored signature information into a document selected as a paste location.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: April 27, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Taeko Yamazaki, Junichi Hayashi
  • Publication number: 20090324099
    Abstract: An information processing apparatus inputs image data including a first pixel group, a second pixel group generated by interpolating the first pixel group and verification data of the first pixel group, verifies whether the first pixel group has been altered using the first pixel group and the verification data, verifies whether the second pixel group has been altered by determining whether the second pixel group and the first pixel group are in a predetermined relationship, and determines whether the image data has been altered based on results of the verification as to whether the first pixel group has been altered and the verification as to whether the second pixel group has been altered.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 31, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Junichi Hayashi
  • Publication number: 20090324070
    Abstract: An information processing apparatus inputs image data and calculates a relative magnitude between coefficient or pixel values of the input image data. The image processing apparatus generates verification data of the image data using the calculated relative magnitude.
    Type: Application
    Filed: June 22, 2009
    Publication date: December 31, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Junichi Hayashi
  • Patent number: 7639835
    Abstract: Additional information is embedded into elements that form digital data by adding or subtracting a value to or from the elements. An element is detected which has a value that exceeds a range that the element can assume after the addition or subtraction is performed, and actual embedding information is generated by combining the additional information and the information detected in the detection step. The actual embedding information generated in the generation step is embedded into the elements, which fall with the range an element can assume, as a digital watermark, while excluding the element that exceeds the range the element can assume after the addition or subtraction is performed.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: December 29, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junichi Hayashi
  • Publication number: 20090251183
    Abstract: A simple circuit for preventing occurrence of a hazard and output delay for an asynchronous input signal in a clock signal. A flip-flop circuit (FF) outputs an output signal at a low level to a clocked inverter circuit (INVO) when a clock signal (PCLKB) transitions from a high level to a low level after an enabling signal (ENAT) goes to a high level. The clocked inverter circuit (INVO) is active when the clock signal (PCLKB) is at a low level, and inverts an output signal of the flip-flop circuit (FF) and outputs the output signal to a holding circuit (LATCH). The holding circuit (LATCH) holds the output signal of the clocked inverter circuit (INVO) and outputs the output signal as a signal (ENAOUT).
    Type: Application
    Filed: April 1, 2009
    Publication date: October 8, 2009
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Junichi HAYASHI
  • Publication number: 20090224442
    Abstract: A method of manufacturing a translucent ceramic is provided. The method comprises: mixing a raw powder and an organic binder and kneading them to obtain a compound, the raw powder containing an aluminum oxide powder and a magnesium oxide powder, and the organic binder containing a first organic component and a second organic component; molding the compound in a predetermined shape by an injection molding method to obtain a green body; debinding the organic binder contained in the green body to obtain a brown body; and sintering the brown body to obtain a sintered body of the translucent ceramic. When the softening point of the first organic component is defined as “T1” (° C.) and the softening point of the second organic component is defined as “T2” (° C.), the kneading step is carried out at a temperature in the range of T2 or higher but lower than T1 after the raw powder and the organic binder are preheated at a temperature in the range of T1 to T1+100(° C.). An orthodontic member is also provided.
    Type: Application
    Filed: March 4, 2009
    Publication date: September 10, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masaaki SAKATA, Junichi HAYASHI, Hideki ISHIGAMI
  • Patent number: 7581115
    Abstract: Even when encoded (compressed) image data appended with an error-detecting code is encrypted, the apparatus which receives and reproduces that image data can execute a normal process without any insignificant re-send request and the like. To this end, encoded image data is input, and first error-detecting encoding information contained in its header is checked to determine whether or not an error-detecting code is appended. If it is determined that the error-detecting code is appended, the first error-detecting encoding information is changed to indicate the absence of an error-detecting code, and is saved as second error-detecting encoding information. Then, the encoded image data is encrypted.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: August 25, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichi Hayashi, Yuji Suga
  • Publication number: 20090164526
    Abstract: This invention allows verifying whether or not an original image content has been altered, to specify all edit processes applied to the original image content, and to hold the edited content. To this end, upon inputting a digital content file to be edited, first verification data included in that file is verified. After the content is edited, edit record information for the content is generated. Upon completion of the edit process and outputting the edited content, second verification data is generated based on the verification result of first verification unit, the edit record, and the edited content. The edited content, the edit record, the verification result of the first verification unit, and the second verification data are combined as an edited digital content file, and the combined file is output.
    Type: Application
    Filed: October 30, 2007
    Publication date: June 25, 2009
    Inventor: Junichi Hayashi
  • Patent number: 7548633
    Abstract: The present invention has an object to provide a data processing apparatus which can perform digital watermark embedding/extraction in accordance with manipulation, editing, and compression. To achieve the object, the data processing apparatus for performing compression processing on digital data comprises: a digital watermark extracting device extracting additional information, embedded as a digital watermark, from digital data; a digital watermark removing device removing the additional information, embedded as a digital watermark, from the digital data; an irreversible processing deice performing irreversible processing on the digital data; and a digital watermark embedding device embedding the additional information as a digital watermark in the irreversible-processed digital data.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: June 16, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junichi Hayashi
  • Patent number: 7546464
    Abstract: When image data in which a digital watermark is embedded accesses a server, particularly, a Web server, via a network, the server is appropriately selected and accessed via the network in accordance with the environments of the clients that access the server. A network access terminal includes an extraction unit for extracting first information from an image that includes the first information, which is multi-valued, an acquisition unit for acquiring from a predetermined storage device the first information extracted by the extraction unit and address information specified by second information different from the first information, from among a plurality of address information stored in the predetermined storage device, and a communication unit for accessing an address based on the address information obtained by the acquisition unit.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: June 9, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Junichi Hayashi, Keiichi Iwamura
  • Patent number: 7541839
    Abstract: A semiconductor device including an AND-NOR composite gate of which AND unit is supplied with input signals IN and VDD and NOR unit is supplied with an inverted signal EB of an enable signal E, and an AND-NOR composite gate of which AND unit is supplied with an input signal INB and an enable signal E and NOR unit is supplied with VSS. These gates are inserted into a path to which the input signals IN and INB are supplied. Thereby, a symmetric property of a complimentary signal can be retained. Further, outputs of the AND-NOR composite gates are fixed irrespective of a logical level of the enable signal E. Thus, a sub-threshold current also is inhibited.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: June 2, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Junichi Hayashi, Hiromasa Noda