Patents by Inventor Junichi Shibata

Junichi Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240415371
    Abstract: To provide a sensor-equipped hood capable of detecting force applied to the hood without narrowing an operating field viewed through the hood. A sensor-equipped hood protrudes from a tip end portion of an endoscope main body, and is attached to the tip end portion. The sensor-equipped hood includes a transparent tubular hood main body and a fiber Bragg grating (FBG) sensor fixed to a first fixing point of the hood main body and having a Bragg grating. In the FBG sensor, the wavelength of reflected light at the Bragg grating changes based on fluctuation of the first fixing point in the hood main body.
    Type: Application
    Filed: December 27, 2022
    Publication date: December 19, 2024
    Inventors: Chuzo TANIGUCHI, Ryomei OMOTE, Junichi SHIBATA, Yoshiro FUJII, Ryoma TANIMOTO
  • Patent number: 12119337
    Abstract: A semiconductor device has a first substrate including an element region, a peripheral region that surrounds the element region, a first insulator with a first recess portion in the peripheral region, a first metal layer in the element region, and a first conductor in the peripheral region to surround the element region. A second substrate has an element region, a peripheral region that surrounds the element region, a second insulator with a second recess portion that faces the first recess portion, a second metal layer in contact with the first metal layer, and a second conductor that surrounds the element region of the second substrate.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: October 15, 2024
    Assignee: Kioxia Corporation
    Inventor: Junichi Shibata
  • Patent number: 12115706
    Abstract: A molded article or an electrical product facilitates layout of a wiring line from an electrical circuit of a circuit film integrally molded with a molded body to a connection terminal. The molded article includes a circuit film and a molded body. The circuit film includes an insulating film and an electrical circuit. The molded body is integrally molded with the circuit film. The circuit film includes a flexible wiring portion. The molded body has a through-hole that penetrates from a first main surface to a second main surface. In the flexible wiring portion, a connection terminal is arranged at a position of passing through the through-hole and beyond the second main surface.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: October 15, 2024
    Assignee: NISSHA CO., LTD.
    Inventors: Chuzo Taniguchi, Ryomei Omote, Eiji Kawashima, Junichi Shibata, Jun Sasaki, Yoshihiro Sakata
  • Patent number: 12102287
    Abstract: An endoscopic hood and an endoscope to which the endoscopic hood is attached improve visibility for the user. The endoscopic hood includes a body formed of a transparent cylinder having two open ends and a conductive film embedded integrally in the body. The conductive film includes a transparent film and a transparent electrode pattern on the transparent film. The transparent electrode pattern includes a transparent electrode, a transparent wire portion extending from the transparent electrode, and a transparent terminal at an end of the transparent wire portion. The transparent terminal is exposed from the body. The endoscope includes an insertion portion insertable into a body of a subject, the endoscopic hood attached to a distal end of the insertion portion, and at least one wire having one end electrically connected to the transparent terminal and another end electrically connected to an external device.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: October 1, 2024
    Assignee: NISSHA CO., LTD
    Inventors: Chuzo Taniguchi, Ryomei Omote, Junichi Shibata, Yoshiro Fujii
  • Publication number: 20240260815
    Abstract: An endoscopic hood and an endoscope to which the endoscopic hood is attached improve visibility for the user. The endoscopic hood includes a body formed of a transparent cylinder having two open ends and a conductive film embedded integrally in the body. The conductive film includes a transparent film and a transparent electrode pattern on the transparent film. The transparent electrode pattern includes a transparent electrode, a transparent wire portion extending from the transparent electrode, and a transparent terminal at an end of the transparent wire portion. The transparent terminal is exposed from the body. The endoscope includes an insertion portion insertable into a body of a subject, the endoscopic hood attached to a distal end of the insertion portion, and at least one wire having one end electrically connected to the transparent terminal and another end electrically connected to an external device.
    Type: Application
    Filed: March 30, 2022
    Publication date: August 8, 2024
    Inventors: Chuzo TANIGUCHI, Ryomei OMOTE, Junichi SHIBATA, Yoshiro FUJII
  • Patent number: 12032194
    Abstract: An illumination display panel that forms part of a housing and has a display portion for illuminated display comprises a resin panel having a first molded portion made of an opaque resin at a portion excluding the display portion, and a second molded portion disposed on the back surface side of the first molded portion and made of a light-transmitting resin having a protrusion where the first molded portion is not present. The protrusion is fitted to the first molded portion. A light source mounting substrate is disposed on the back surface side of the resin panel. At least a light source of the light source mounting substrate is sealed by the second molded portion. An integrally molded product of the light source mounting substrate and the second molded portion is filled and solidified at a low pressure while compressing a cavity of a molding mold.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: July 9, 2024
    Assignee: NISSHA CO., LTD.
    Inventors: Chuzo Taniguchi, Ryomei Omote, Junichi Shibata, Jun Sasaki, Yoshihiro Sakata, Toshifumi Kurosaki, Shohei Morimoto
  • Patent number: 11996376
    Abstract: A semiconductor storage device includes a first chip and a second chip. The first chip includes a semiconductor substrate, transistors, a first interconnect, and first bonding electrodes. The second chip includes a memory cell array and second bonding electrodes. The second bonding electrodes are bonded to the first bonding electrodes. The first chip or the second chip has bonding pad electrodes. The second bonding electrodes include third bonding electrodes and fourth bonding electrodes. The third and fourth bonding electrodes overlap the memory cell array. The third bonding electrodes are in a current pathway between the memory cell array and the transistors whereas the fourth bonding electrodes are not in such a current pathway. The first interconnect is electrically connected to a bonding pad electrode and a fourth bonding electrode directly, without a current path via any one of transistors.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 28, 2024
    Assignee: Kioxia Corporation
    Inventor: Junichi Shibata
  • Publication number: 20230413566
    Abstract: In one embodiment, a semiconductor device includes a first substrate, a first transistor provided on an upper face of the first substrate, and a memory cell array provided above the first transistor. The device further includes a second substrate provided above the memory cell array, and a second transistor provided on an upper face of the second substrate.
    Type: Application
    Filed: February 14, 2023
    Publication date: December 21, 2023
    Applicant: Kioxia Corporation
    Inventors: Hideto TAKEKIDA, Junichi SHIBATA
  • Publication number: 20230282633
    Abstract: A semiconductor device has a first substrate including an element region, a peripheral region that surrounds the element region, a first insulator with a first recess portion in the peripheral region, a first metal layer in the element region, and a first conductor in the peripheral region to surround the element region. A second substrate has an element region, a peripheral region that surrounds the element region, a second insulator with a second recess portion that faces the first recess portion, a second metal layer in contact with the first metal layer, and a second conductor that surrounds the element region of the second substrate.
    Type: Application
    Filed: April 10, 2023
    Publication date: September 7, 2023
    Inventor: Junichi SHIBATA
  • Patent number: 11658169
    Abstract: A semiconductor device has a first substrate including an element region, a peripheral region that surrounds the element region, a first insulator with a first recess portion in the peripheral region, a first metal layer in the element region, and a first conductor in the peripheral region to surround the element region. A second substrate has an element region, a peripheral region that surrounds the element region, a second insulator with a second recess portion that faces the first recess portion, a second metal layer in contact with the first metal layer, and a second conductor that surrounds the element region of the second substrate.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 23, 2023
    Assignee: Kioxia Corporation
    Inventor: Junichi Shibata
  • Publication number: 20230075178
    Abstract: A molded article or an electrical product facilitates layout of a wiring line from an electrical circuit of a circuit film integrally molded with a molded body to a connection terminal. The molded article includes a circuit film and a molded body. The circuit film includes an insulating film and an electrical circuit. The molded body is integrally molded with the circuit film. The circuit film includes a flexible wiring portion. The molded body has a through-hole that penetrates from a first main surface to a second main surface. In the flexible wiring portion, a connection terminal is arranged at a position of passing through the through-hole and beyond the second main surface.
    Type: Application
    Filed: January 22, 2021
    Publication date: March 9, 2023
    Applicant: NISSHA CO.,LTD.
    Inventors: Chuzo TANIGUCHI, Ryomei OMOTE, Eiji KAWASHIMA, Junichi SHIBATA, Jun SASAKI, Yoshihiro SAKATA
  • Patent number: 11534846
    Abstract: A wire electrical discharge machine to cut a workpiece by generating an electrical discharge in a dielectric working fluid between wire electrodes arranged in parallel and the workpiece includes: a work tank that stores the dielectric working fluid; a Z-axis stage that is disposed in a lower portion of the work tank and moves the workpiece in a Z-axis direction that is a vertical direction; a pillar that extends upward from the Z-axis stage and has an upper end portion located above the highest level of a fluid level of the dielectric working fluid in the work tank; an adjuster that is installed downward from a portion of the pillar located above the highest level of the fluid level, is disposed above the highest level of the fluid level, and adjusts the position or posture of the workpiece in a direction other than the vertical direction.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: December 27, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takashi Yuzawa, Yoichi Otomo, Junichi Shibata
  • Publication number: 20220302152
    Abstract: In one embodiment, a semiconductor device includes first electrode layers spaced from one another in a first direction, and second electrode layers provided above the first electrode layers, and spaced from one another in the first direction. The device further includes a first columnar portion extending in the first direction in the first electrode layers, and including a first semiconductor layer, and a second columnar portion provided on the first columnar portion, extending in the first direction in the second electrode layers, and including a second semiconductor layer. The first columnar portion includes a first portion having a first width, and a second portion having a second width larger than the first width above the first portion. The second columnar portion includes a third portion having a third width, and a fourth portion having a fourth width larger than the third width above the third portion.
    Type: Application
    Filed: September 14, 2021
    Publication date: September 22, 2022
    Applicant: Kioxia Corporation
    Inventors: Koichi SAKATA, Junichi SHIBATA
  • Publication number: 20220252778
    Abstract: An illumination display panel that forms part of a housing and has a display portion for illuminated display comprises a resin panel having a first molded portion made of an opaque resin at a portion excluding the display portion, and a second molded portion disposed on the back surface side of the first molded portion and made of a light-transmitting resin having a protrusion where the first molded portion is not present. The protrusion is fitted to the first molded portion. A light source mounting substrate is disposed on the back surface side of the resin panel. At least a light source of the light source mounting substrate is sealed by the second molded portion. An integrally molded product of the light source mounting substrate and the second molded portion is filled and solidified at a low pressure while compressing a cavity of a molding mold.
    Type: Application
    Filed: August 17, 2020
    Publication date: August 11, 2022
    Inventors: Chuzo TANIGUCHI, Ryomei OMOTE, Junichi SHIBATA, Jun SASAKI, Yoshihiro SAKATA, Toshifumi KUROSAKI, Shohei MORIMOTO
  • Publication number: 20220143724
    Abstract: A wire electrical discharge machine to cut a workpiece by generating an electrical discharge in a dielectric working fluid between wire electrodes arranged in parallel and the workpiece includes: a work tank that stores the dielectric working fluid; a Z-axis stage that is disposed in a lower portion of the work tank and moves the workpiece in a Z-axis direction that is a vertical direction; a pillar that extends upward from the Z-axis stage and has an upper end portion located above the highest level of a fluid level of the dielectric working fluid in the work tank; an adjuster that is installed downward from a portion of the pillar located above the highest level of the fluid level, is disposed above the highest level of the fluid level, and adjusts the position or posture of the workpiece in a direction other than the vertical direction.
    Type: Application
    Filed: April 5, 2019
    Publication date: May 12, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takashi YUZAWA, Yoichi OTOMO, Junichi SHIBATA
  • Publication number: 20220059481
    Abstract: A semiconductor storage device includes a first chip and a second chip. The first chip includes a semiconductor substrate, transistors, a first interconnect, and first bonding electrodes. The second chip includes a memory cell array and second bonding electrodes. The second bonding electrodes are bonded to the first bonding electrodes. The first chip or the second chip has bonding pad electrodes. The second bonding electrodes include third bonding electrodes and fourth bonding electrodes. The third and fourth bonding electrodes overlap the memory cell array. The third bonding electrodes are in a current pathway between the memory cell array and the transistors whereas the fourth bonding electrodes are not in such a current pathway. The first interconnect is electrically connected to a bonding pad electrode and a fourth bonding electrode directly, without a current path via any one of transistors.
    Type: Application
    Filed: March 1, 2021
    Publication date: February 24, 2022
    Inventor: Junichi SHIBATA
  • Publication number: 20210296299
    Abstract: A semiconductor device has a first substrate including an element region, a peripheral region that surrounds the element region, a first insulator with a first recess portion in the peripheral region, a first metal layer in the element region, and a first conductor in the peripheral region to surround the element region. A second substrate has an element region, a peripheral region that surrounds the element region, a second insulator with a second recess portion that faces the first recess portion, a second metal layer in contact with the first metal layer, and a second conductor that surrounds the element region of the second substrate.
    Type: Application
    Filed: August 28, 2020
    Publication date: September 23, 2021
    Inventor: Junichi SHIBATA
  • Patent number: 10998287
    Abstract: In one embodiment, a semiconductor device includes a first wafer or a first chip including a first insulator and a first pad. The device further includes a second wafer or a second chip including a second insulator in contact with the first insulator, and a second pad opposed to the first pad and electrically connected to the first pad. Moreover, the first insulator includes a first trench extending to the first pad, and/or the second insulator includes a second trench extending to the second pad.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: May 4, 2021
    Assignee: Toshiba Memory Corporation
    Inventor: Junichi Shibata
  • Publication number: 20200354273
    Abstract: Provided is a novel metallic coarse aggregate for concrete which can be used as a coarse aggregate which is one of the essential constituents of concrete, can further improve the compressive strength and tensile strength of concrete, is less likely to be sedimented in fresh concrete, and has good productivity at a low cost. The metallic coarse aggregate for concrete includes a coarse aggregate body including a spherical cap portion bonded body having two hollow spherical cap portions and an annular portion protruding from a surface of the spherical cap portion bonded body so as to surround an outer periphery of the spherical cap portion bonded body, the annular portion having a shape in which a corner of a rectangular shape is bent upward or downward.
    Type: Application
    Filed: March 30, 2020
    Publication date: November 12, 2020
    Applicant: IBH SHIBATA, INC.
    Inventors: Junichi SHIBATA, Manzo UCHIGASAKI
  • Publication number: 20200294958
    Abstract: In one embodiment, a semiconductor device includes a first wafer or a first chip including a first insulator and a first pad. The device further includes a second wafer or a second chip including a second insulator in contact with the first insulator, and a second pad opposed to the first pad and electrically connected to the first pad. Moreover, the first insulator includes a first trench extending to the first pad, and/or the second insulator includes a second trench extending to the second pad.
    Type: Application
    Filed: August 15, 2019
    Publication date: September 17, 2020
    Applicant: Toshiba Memory Corporation
    Inventor: Junichi SHIBATA