Abstract: This application relates to semiconductor die including: a transistor device formed in an active area of a semiconductor body and having a channel region, a gate region, and a field electrode region, the gate region arranged laterally aside the channel region and having a gate electrode for controlling a current flow in the channel region, the gate electrode formed in a gate trench extending into the semiconductor body; and an additional device formed in an additional device area of the semiconductor body. A recess extends into the semiconductor body in the additional device area, and a semiconductor material is arranged in the recess in which the additional device is formed.

Abstract: The application relates to a semiconductor power device including a semiconductor body in which a transistor device is formed, the transistor device having a gate region and a channel region laterally aside the gate region, the gate region including a gate electrode for controlling a channel formation in the channel region, and a gate dielectric laterally between the channel region and the gate electrode. The gate electrode includes a gate electrode bulk region and a gate electrode layer laterally between the gate dielectric and the gate electrode bulk region. The gate electrode layer is made of a doped metallically conductive material.

Abstract: A method for manufacturing a semiconductor transistor device includes etching a vertical gate trench into a silicon region, depositing a silicon gate material on an interlayer dielectric formed in the vertical gate trench so that an upper side of the interlayer dielectric is covered, etching through the silicon gate material in the vertical gate trench to partly uncover the upper side of the interlayer dielectric and so that a silicon gate region of a gate electrode of the semiconductor transistor device remains in the vertical gate trench, and depositing a metal material into the vertical gate trench so that the partly uncovered upper side of the interlayer dielectric is covered by the metal material.

Abstract: A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode.

Abstract: This application relates to semiconductor die including: a transistor device formed in an active area of a semiconductor body and having a channel region, a gate region, and a field electrode region, the gate region arranged laterally aside the channel region and having a gate electrode for controlling a current flow in the channel region, the gate electrode formed in a gate trench extending into the semiconductor body; and an additional device formed in an additional device area of the semiconductor body. A recess extends into the semiconductor body in the additional device area, and a semiconductor material is arranged in the recess in which the additional device is formed.

Abstract: A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode.

Abstract: A method of forming recess for a trench gate electrode includes forming a trench in a first major surface of a semiconductor substrate, the trench having a base and a side wall extending from the base to the first major surface, forming a first insulating layer on the base and the side wall of the trench, inserting a first conductive material into the trench that at least partially covers the first insulation layer to form a field plate in a lower portion of the trench, applying a second insulating layer to the first major surface and the trench such that the second insulating layer fills the trench and covers the conductive material, removing the second insulating layer from the first major surface and partially removing the second insulating layer from the trench by etching and forming a recess for a gate electrode in the second insulating layer in the trench.