Patents by Inventor Ka-Chiu Woo

Ka-Chiu Woo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5621327
    Abstract: Apparatus and method are disclosed for performing testing and fault isolation of high density passive boards and substrates. Using a small number of moving probes, simultaneous network resistance and network capacitance measurements may be performed. Thus, test time is minimized by eliminating the need for electrical switching and/or excessive probe movement during the test of a normal circuit board network. Simultaneous network capacitance and network leakage measurement are also achieved using phase-sensitive detection. Dual-frequency measurement techniques allow the measurement of both the capacitance value and resistance value of a leakage path between a network being measured and an unknown network. Any leakage resistance between a network under test and ground or power planes within the circuit board may also be determined from the measurements.
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: April 15, 1997
    Assignee: International Business Machines Corporation
    Inventors: Shinwu Chiang, Huntington W. Curtis, Arthur E. Falls, Arnold Halperin, John P. Karidis, John D. Mackay, Danny C.-Y. Wong, Ka-Chiu Woo, Li-Cheng Zai
  • Patent number: 5438272
    Abstract: A network-under-test of a device is tested relative to other networks of the device by probing the network-under-test with a probe; generating a voltage which is applied across the network-under-test via the probe for developing a transient voltage between the network-under-test and the other networks of the device for stressing leakage resistance between the network-under-test and the other networks; and determining if the stressed leakage resistance is acceptable for determining integrity of the network-under-test relative to the other networks of the device.
    Type: Grant
    Filed: May 9, 1994
    Date of Patent: August 1, 1995
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Craig, Ka-Chiu Woo
  • Patent number: 5402072
    Abstract: Apparatus and method are disclosed for performing testing and fault isolation of high density passive boards (e.g. unpopulated circuit boards) and substrates. Using a small number of moving probes, simultaneous network resistance and network capacitance measurements may be performed. Thus, test time is minimized by eliminating the need for electrical switching and/or excessive probe movement during the test of a normal circuit board network. Simultaneous network capacitance and network leakage measurement are also achieved using phase-sensitive detection. Dual-frequency measurement techniques allow the measurement of both the capacitance value and resistance value of a leakage path between a network being measured and an unknown network. Any leakage resistance between a network under test and ground or power planes within the circuit board may also be determined from the measurements.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: March 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Shinwu Chiang, Huntington W. Curtis, Arthur E. Falls, Arnold Halperin, John P. Karidis, John D. Mackay, Danny C. Wong, Ka-Chiu Woo, Li-Cheng Zai
  • Patent number: 5266901
    Abstract: A system and a method for testing the integrity of interconnection networks on a circuit board or substrate are disclosed. To test the continuity of a being tested network, two probes are used. To test the integrity of the being tested network, as it relates to other nets on the circuit board, a rectangular pulse is provided to the being tested network, and a signal in response to the stimulus pulse, provided across an external capacitor and resistor connected to the reference plane of the circuit board or substrate, is sampled by a transient analyzer. The leading edge of the thus sampled response signal provides an indication of whether the being tested net is acceptable, opened, shorted, or has a high leakage resistance to another net.
    Type: Grant
    Filed: May 29, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corp.
    Inventor: Ka-Chiu Woo