Abstract: A computer-implemented framework and/or system for cyberbullying detection is disclosed. The system includes two main components: (1) A representation learning network that encodes the social media session by exploiting multi-modal features, e.g., text, network, and time; and (2) a multi-task learning network that simultaneously fits the comment inter-arrival times and estimates the bullying likelihood based on a Gaussian Mixture Model. The system jointly optimizes the parameters of both components to overcome the shortcomings of decoupled training. The system includes an unsupervised cyberbullying detection model that not only experimentally outperforms the state-of-the-art unsupervised models, but also achieves competitive performance compared to supervised models.

Abstract: A semiconductor structure is provided, and comprises: a substrate, an insulation layer and a protruding structure. The insulation layer is located on the substrate, and the protruding structure protrudes from the insulation layer, where the protruding structure further includes a first heterojunction structure, a second heterojunction structure, . . . , and an n-th heterojunction structure that are sequentially stacked in a direction away from the substrate, and n is greater than or equal to 2, wherein the first heterojunction structure includes a first channel layer and a first barrier layer, the second heterojunction structure includes a second channel layer and a second barrier layer, . . . , and the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and component proportions of at least two of the first barrier layer, the second barrier layer, . . . , or the n-th barrier layer are different.

Abstract: Disclosed are a semiconductor structure and a preparation method thereof. The semiconductor structure includes a substrate, including a first region arranged at the center of the substrate and a second region arranged at the periphery of the first region; and a composite buffer layer arranged on the substrate, including a carbon-containing first buffer layer including at least one set of a first sub-buffer layer and a second sub-buffer layer stacked in layers; therein, a carbon concentration of the first sub-buffer layer arranged at the first region is higher than that arranged at the second region; and a carbon concentration of the second sub-buffer layer arranged at the first region is lower than that at arranged the second region. Therefore, uniformity of the carbon concentration of the composite buffer layer is improved to improve resistivity of the composite buffer layer, so as to increase breakdown voltage and improve device performance.

Abstract: The present disclosure provides a semiconductor structure including a substrate, an insulation layer on the substrate; a protrusion structure protruding out of the insulation layer, where the protrusion structure includes a source region, a drain region and a channel region between whereof; the protrusion structure includes a first heterojunction structure, . . . and an n-th heterojunction structure sequentially stacked along a direction away from the substrate, where n is an integer greater than or equal to 2; the first heterojunction structure includes a first channel layer and a first barrier layer, . . . the n-th heterojunction structure includes an n-th channel layer and an n-th barrier layer, and at least one of the first barrier layer, . . . or the n-th barrier layer is doped with an N-type element; the source electrode on the source region, the drain electrode on the drain region, and the gate structure on the channel region.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method of the semiconductor, including: a first semiconductor layer, where first protrusions are at a first surface of the first semiconductor layer; and a second semiconductor layer on the first semiconductor layer, where second protrusions are at a surface of the second semiconductor layer away from the first semiconductor layer, the second protrusions correspond to the first protrusions. A conductivity type of the second semiconductor layer is the same as a conductivity type of the first semiconductor layer, and a doping concentration of the second semiconductor layer is lower than a doping concentration of the first semiconductor layer. The third semiconductor layer is on the second semiconductor layer, and a conductivity type of the third semiconductor layer is opposite to the conductivity type of the first semiconductor layer.

Abstract: The present application provides methods for manufacturing a vertical device. To begin with, a GaN-based semiconductor substrate is etched from a front surface to form a trench. Then, a P-type semiconductor layer and an N-type semiconductor layer are sequentially formed on a bottom wall and side walls of the trench and the front surface of the semiconductor substrate. The trench is partially filled with the P-type semiconductor layer. Thereafter, the N-type semiconductor layer and the P-type semiconductor layer are planarized, and the P-type semiconductor layer and the N-type semiconductor layer in the trench are retained. Next, a gate structure is formed at a gate area of the front surface of the semiconductor substrate, a source electrode is formed on two sides of the gate structure, and a drain electrode is formed on a rear surface of the semiconductor substrate respectively.

Abstract: A portable information handling system supports a flexible OLED display film over housing portions rotationally coupled by a hinge by folding the OLED display film over the hinge. Hinge brackets that couple to the housing portions each have a gear member with a semicircular shape gear inner circumference that engages a gear subassembly of the hinge main body. Hinge bracket rotation translates through the gear subassembly for synchronized housing rotation. The hinge main body has first and second semicircular portions with a smooth surface defined to accept the outer circumference smooth surface of the gear member semicircular shape at first and second rotation axes about which the hinge brackets pivot so that the display film has space to fold in the closed position.

Abstract: A method of manufacturing an electronic device including the following steps is provided herein. A plurality of first electronic components is provided. The plurality of first electronic components is transferred onto a plurality of pickup sites. An empty pickup site from the plurality of pickup sites may be figured out, wherein the plurality of first electronic components is absent at the empty pickup site. A second electronic component is transferred onto the empty pickup site. A target substrate is provided. The plurality of first electronic components and the second electronic component are transferred onto the target substrate.

Abstract: The present disclosure provides a composite substrate and semiconductor device structure, where the composite substrate includes: a base; a DBR layer on a side of the base; and a growing substrate on a side of the DBR layer far from the base. In the present disclosure, the growing substrate can be prepared on the top layer of the DBR layer by a bonding process, which requires a lower temperature than the high-temperature epitaxial process, reducing the risk of DBR layer decomposition during the preparation of the growing substrate, thereby, improving the stability of the DBR layer.

Abstract: Present invention is related to a polyimide of formula as following: and a ketone-containing alicyclic dianhydride of formula as following: wherein: R1, R2, R3, R4 denote hydrogen atom or carbon containing functional group with carbon number at a range of 1-4; R5 denotes diamine group; and n equals to any positive integer.

Abstract: Disclosed are a composite substrate and a semiconductor structure, and the composite substrate includes a first semiconductor layer and a second semiconductor layer that are stacked, at least one heat dissipation groove is disposed on a surface, close to the second semiconductor layer, of the first semiconductor layer, a heat dissipation channel is disposed on a side wall of the first semiconductor layer, or a surface, away from the second semiconductor layer, of the first semiconductor layer, and the heat dissipation channel is in communication with the heat dissipation groove. The composite substrate and the semiconductor structure according to the present application can effectively resolve a heat dissipation problem of a high-power gallium nitride-based component by using a heat dissipation channel and a heat dissipation groove that are interconnected internal and external.

Abstract: A method of fabricating a semiconductor device is provided. First, a semiconductor structure is provided, and the semiconductor structure includes a buried dielectric layer, a first gate structure disposed on a front-side of the buried dielectric layer, and a first source/drain region and a second source/drain region disposed between the buried dielectric layer and the first gate structure. Then, a trench is formed in the buried dielectric layer. Afterwards, a conductive layer is formed on the buried dielectric layer and in the trench. Finally, the conductive layer is patterned.

Abstract: A composite substrate, a photoelectric device and a preparation method therefor. The composite substrate comprises a base substrate and a nano-diamond structure located on the base substrate; the nano-diamond structure comprises a plurality of nano-diamond protrusions arranged at intervals, and a gap is provided between two adjacent nano-diamond protrusions. The photoelectric device comprises the composite substrate, and further comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked on the composite substrate; the first semiconductor layer comprises protruding portions and a flat portion sequentially stacked in the vertical direction, the protruding portions are in the gaps and correspond one-to-one to the gaps, and the flat portion is located on the protruding portions and the nano-diamond structure. The preparation method for the photoelectric device is used for manufacturing the photoelectric device.

Abstract: An electronic device includes a substrate, a spacer, a first element and a second element. A spacer is disposed on the substrate and has a first opening, a second opening and a third opening arranged in a first direction. The second opening is located between the first opening and the third opening. A distance between the first opening and the second opening is less than a distance between the second opening and the third opening in the first direction. A first element is located in at least one of the first opening and the second opening. A second element is located in the third opening.

Abstract: Embodiments of the present application disclose a semiconductor structure and a manufacturing method for the semiconductor structure, which solve problems of complicated manufacturing process and poor stability and reliability of existing semiconductor structures. The semiconductor structure includes: a substrate; a channel layer and a barrier layer sequentially superimposed on the substrate, wherein the channel layer and the barrier layer are made of GaN-based materials and an upper surface of the barrier layer is Ga-face; and a p-type GaN-based semiconductor layer formed in a gate region of the barrier layer. An upper surface of the p-type GaN-based semiconductor layer is N-face.

Abstract: A manufacturing method for the LED structure, including: growing a first conductive-type semiconductor layer on a substrate; growing an active layer on the first conductive-type semiconductor layer, where the active layer includes a potential well layer, an insertion layer and a potential barrier layer that are stacked, the insertion layer includes a first insertion layer and a second insertion layer that are stacked, a quantum confinement Stark effect is generated between the first insertion layer and the potential well layer, the materials of the potential well layer, the first insertion layer and the potential barrier layer are all group III-V semiconductor materials, and the material of the second insertion layer includes Si—N bonds for repairing V-type defects of the first insertion layer; and growing a second conductive-type semiconductor layer on the active layer, where the first conductive-type semiconductor layer and the second conductive-type semiconductor layer have opposite conductivity types.

Abstract: A method for three dimensional medical image construction having steps of inputting multiple two-dimensional images and a known three-dimensional image into a processing module and inputting a new two-dimensional image into the processing module to obtain a reconstructed three-dimensional image, wherein the processing module utilizes a neural network to build a reconstructed three-dimensional image by unfolding the two-dimensional image to produce a three-dimensional reconstruction.

Abstract: A sleep apnea assessment method includes the following steps. A sleep apnea assessment system is provided. A target ECG signal data of the subject is obtained. A data pre-processing step is performed so as to obtain a target ECG time-frequency data, and the target ECG time-frequency data is processed so as to obtain a plurality of target time-frequency segment data. An assessing step of apnea event is performed so as to output an assessing result of sleep apnea event of each of the plurality of target time-frequency segment data, and the assessing result of sleep apnea event is for assessing whether the subject has the sleep apnea event in any one of the plurality of target time-frequency segment data or not and predicting a probability of an occurrence of sleep apnea event of the subject.

Abstract: A GaN-based laser and a manufacturing method thereof are provided in this present disclosure. The GaN-based laser includes: an epitaxial substrate unit; and a light-emitting unit located on the epitaxial substrate unit, where the light-emitting unit includes an active layer unit, which is arranged parallel to the epitaxial substrate unit; the light emitting unit includes a pair of first sidewall and second sidewall, which are opposite to each other; a first reflector is provided on the first sidewall and a second reflector is provided on the second sidewall, and the first reflector or second reflector corresponds to the light emitting surface. The first reflector and the second reflector are arranged on the side surfaces of the active layer unit.

Abstract: A method of manufacturing a semiconductor device including the following steps is provided herein. A semiconductor substrate is provided. The semiconductor substrate is transferred to a carrier. The semiconductor substrate on the carrier is diced into a plurality of semiconductor 5 components. A target substrate is provided. At least one of the semiconductor components is transferred onto the target substrate.