Patents by Inventor Kaichi Yamamoto

Kaichi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6300972
    Abstract: A video card capable of being mounted in an information processing apparatus so as to enable suitable performance of a television conference system etc., wherein video data fetched into a video card from a camera by a capture operation is recorded in the first region of a DRAM and encoded at a signal processing unit. The encoded video data is recorded in the second region of the DRAM, sequentially transferred to a main memory of a notebook type PC, and transmitted to a network via a communication I/F card. The video data received from the network is stored once in the main memory, transferred to the fourth region of the DRAM of the video card, decoded at the signal processing unit, and recorded in the third region of the DRAM. Immediately before the next capture operation, the video data which was fetched into the first region of the DRAM before this and the received video data which has been recorded in the third region are displayed on a display via a VGA controller.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: October 9, 2001
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4672480
    Abstract: Digital data is recorded on a slant track of a magnetic tape by a rotary head, in which the sampling frequency of the digital data can be changed in accordance with the nature of the digital data. The recording apparatus comprises a memory for writing the digital data in response to an input clock signal which is synchronized with the sampling frequency and reading the digital data therefrom in response to a system clock signal; and a circuit for converting the digital data read out from the memory into a data block having such a capacity that the data block can be recorded during one scan of the rotary head. Even when the data rate of the input digital signal is unclear, if the data rate lies within a range where the buffer memory does not overflow, the apparatus can continuously record the input digital signal. Thus, the apparatus can easily interface with an external computer.
    Type: Grant
    Filed: November 9, 1984
    Date of Patent: June 9, 1987
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4533937
    Abstract: A key signal generating apparatus for a digital chromakey system for generating a key signal in accordance with the difference between a reference hue corresponding to a back color data and a hue of an input video data in U-V chroma signal coordinates, in which the gain of key signal is determined by quadratic curve groups in the U-V chroma signal coordinates.
    Type: Grant
    Filed: September 9, 1982
    Date of Patent: August 6, 1985
    Assignee: Sony Corporation
    Inventors: Kaichi Yamamoto, Jun Yonemitsu
  • Patent number: 4509016
    Abstract: A signal detecting circuit detects the presence in an input signal of a component of a predetermined frequency f.sub.p. The circuit includes a sampling arrangement for sampling the input signal at predetermined times separated by a sampling period 1/f.sub.s and providing first, second, and third signal samples. An adding circuit provides a sum signal A+C from the first and third signal samples, and a calculating circuit provides a calculated signal 2B cos .theta. from the second signal sample, where .theta. is the phase relation of the signal samples 2.pi.f.sub.s /f.sub.p. A comparator provides an output signal when the values of the sum signal A+B and the calculated signal 2B cos .theta. are substantially equal, indicating the presence of the component of interest.
    Type: Grant
    Filed: February 21, 1984
    Date of Patent: April 2, 1985
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4488169
    Abstract: In a digital chromakey apparatus, a digital key signal is generated in response to specified chroma information of first digital video signal designating a foreground scene and the first digital video signal is switched into second digital video signal designating a background scene in accordance with level of the digital key signal. According to this invention, the digital key signal is adjusted or compensated in level at portions of leading and trailing edges thereof so as to expand or compress the area of chromakey.
    Type: Grant
    Filed: July 8, 1982
    Date of Patent: December 11, 1984
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4468710
    Abstract: A digital video and audio data recording and/or reproducing apparatus includes a plurality of rotary magnetic heads provided in association with a tape guide drum assembly having a periphery about which a magnetic tape is helically transported at a predetermined wrap angle, a time compressing circuit for time compressing digitized audio and video data, a multiplexing circuit for mixing the digitized audio and video data to form a mixed signal, a processing circuit for processing the mixed signal, and a signal distributing circuit for supplying the processed mixed signal to each of the rotary magnetic heads so that the latter record the processed mixed signal on the magnetic tape.
    Type: Grant
    Filed: April 8, 1981
    Date of Patent: August 28, 1984
    Assignee: Sony Corporation
    Inventors: Yoshitaka Hashimoto, Kaichi Yamamoto, Norihisa Shirota
  • Patent number: 4463387
    Abstract: A digitized video data recording and/or reproducing system comprises a plurality of rotary magnetic heads are disposed on a rotary tape guide drum on the periphery of which a magnetic tape is helically transported at a predetermined wrap angle. A signal processing circuit divides a digitized video signal such that each horizontal scan interval thereof contains a plurality of data blocks, and a signal distributing circuit distributes the blocks of the digitized video data sequentially to the magnetic heads, so that every nth block of each horizontal scan interval is distributed to a respective one of the heads, where n is an even integer. Preferably, there are eight blocks in each horizontal scan interval, and every fourth block is distributed to a respective head.
    Type: Grant
    Filed: April 16, 1981
    Date of Patent: July 31, 1984
    Assignee: Sony Corporation
    Inventors: Yoshitaka Hashimoto, Kaichi Yamamoto, Norihisa Shirota
  • Patent number: 4437125
    Abstract: An identification signal is generated to identify a digital signal, such as a digital video signal reproduced by a digital video tape recorder (DVTR), as odd or even. Commencing periodically, such as at the onset of each field interval, identification signals occurring at intervals in the digital signal are sampled, and an odd plurality (e.g., three) thereof determined to be error-free are stored. A synthetic identification signal is generated whose value is determined by the majority of the stored identification signals. The generated signal is then stored, for example, in a cascade of flip-flops, to provide a second synthetic identification signal from the onset of each field interval until the majority of the sampled identification signals is determined.
    Type: Grant
    Filed: October 27, 1981
    Date of Patent: March 13, 1984
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4429334
    Abstract: A method for recording a color video signal in a plurality of parallel tracks extending obliquely on a magnetic tape includes the steps of sampling the video signal at a frequency which is at least three times the color sub-carrier frequency of the color video signal, converting the sampled video signal into digital form, and recording respective pluralities of the digitized samples which are arranged in a predetermined sequence sequentially in the plurality of parallel tracks, by either recording respective pluralities of contiguous digitized samples sequentially in the tracks, in which each plurality corresponds to at least one cycle of the color sub-carrier, or by alternately separating contiguous ones of the digitized samples into first and second blocks and recording respective pluralities of successive digitized samples of the first and second blocks sequentially in the tracks with the sampling frequency being equal to four times the color sub-carrier frequency, such that the chrominance component of th
    Type: Grant
    Filed: October 7, 1980
    Date of Patent: January 31, 1984
    Assignee: Sony Corporation
    Inventors: Yoshitaka Hashimoto, Norihisa Shirota, Kaichi Yamamoto
  • Patent number: 4392162
    Abstract: Apparatus is provided for use in a digital video signal playback device of the type having a record medium in which plural channels of digital video signals are recorded in a like plurality of tracks. Plural transducers, such as playback heads, are associated with respective ones of the channels and reproduce the digital video signals from the plural tracks, each transducer normally reproducing a respective, predetermined channel of the digital video signals. A detector detects the particular channel with which the digital video signal reproduced by each transducer is associated. A signal interchanger is provided with plural channel outputs and is responsive to the detector for directing digital video signals which have been reproduced by transducers associated with channels which differ from the channels of the reproduced digital video signals to the proper channel outputs as determined by the detector.
    Type: Grant
    Filed: September 30, 1980
    Date of Patent: July 5, 1983
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4378593
    Abstract: A time base converter for compressing or expanding the time base of an input digital signal comprises a data input terminal; a digital output circuit; a number n of memory banks for storing the input digital signal which is written therein at a write clock frequency and read out therefrom at a read clock frequency, and having a memory cycle with a writing phase and a reading phase in each period thereof and which is synchronized with the read clock, with the write clock frequency and the read clock frequency being different from one another; a number M of input latches in series between the data input terminal and each respective memory bank for gating to the latter a group of data words of the input digital signal in parallel, each input latch having a number N of channels, each channel processing a predetermined subgroup of the group of words; and an output latching circuit to couple the memory banks to the output circuit.
    Type: Grant
    Filed: October 23, 1980
    Date of Patent: March 29, 1983
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto
  • Patent number: 4364081
    Abstract: A method for processing a digital color video signal formed of 8-bit words, includes the recording steps of converting each 8-bit word into a 10-bit word in accordance with a predetermined mapping function, grouping the 10-bit words into 48 word blocks, adding to each block an identification signal, identification signal check words P.sub.1 and Q.sub.1, and data check words P.sub.2 and Q.sub.2, the latter being formed by the equations: ##EQU1## where T.sup.-1, T.sup.-2, . . . T.sup.-(n-1), T.sup.-n, T.sup.1, T.sup.2, . . . T.sup.n-1, T.sup.n are distinct, non-zero elements of a Galois field (2.sup.
    Type: Grant
    Filed: April 16, 1981
    Date of Patent: December 14, 1982
    Assignee: Sony Corporation
    Inventors: Yoshitaka Hashimoto, Norihisa Shirota, Kaichi Yamamoto
  • Patent number: 4348659
    Abstract: An analog signal is quantized over a range of quantizing levels, each level being associated with a digital signal, and wherein the digital signals which are associated with a predetermined band of the quantizing levels have zero disparity. In accordance with one aspect, those digital signals which are outside the aforementioned band and which have non-zero disparity are selected to represent corresponding quantizing levels in such a manner that positive and negative disparity signals are selected, alternately, to represent quantized analog signals which are disposed outside the predetermined band. In accordance with another aspect, those zero disparity digital signals having the smallest run-lengths are assigned to represent quantizing levels which are disposed substantially in the center of the quantizing range, and those zero disparity digital signals having progressively larger run-lengths are assigned to represent quantizing levels which are disposed progressively farther from the center of the range.
    Type: Grant
    Filed: October 22, 1980
    Date of Patent: September 7, 1982
    Assignee: Sony Corporation
    Inventors: Yasuhiro Fujimori, Kaichi Yamamoto
  • Patent number: 4329708
    Abstract: In a digital video signal processing apparatus having error correcting and concealing capabilities, a video signal is converted to a digital signal and transmitted or recorded with error detecting and error correcting signals. Upon receiving or reproducing the transmitted signal, an error in th digitized video signal is detected by means of the error detecting signal, and corrected, if possible, by means of the error correcting signal. If the error is so extensive that its correction by the error correction signal is not possible, the erroneous signal is concealed by its replacement with a substantially corresponding signal of the previous field which has been stored in a suitable memory.
    Type: Grant
    Filed: September 30, 1980
    Date of Patent: May 11, 1982
    Assignee: Sony Corporation
    Inventors: Kaichi Yamamoto, Kazuo Yoshimoto
  • Patent number: 4167754
    Abstract: A solid state television camera with a noise eliminating circuit includes a solid state image sensor of semiconductor material to provide an output signal in correspondence to the image of an object projected thereon; a memory to memorize the positions of crystal defects in the semiconductor material; and a control circuit responsive to the output of the memory for eliminating from the output signal of the solid state image sensor noise due to crystal defects in the semiconductor material. The position of the first of the crystal defects encountered in the raster is determined by the distance, measured either along the successive scanning lines or along the orthogonal axes of the raster, between a reference point and such first crystal defect and that distance is encoded and memorized in the memory.
    Type: Grant
    Filed: January 23, 1978
    Date of Patent: September 11, 1979
    Assignee: Sony Corporation
    Inventors: Fumio Nagumo, Kaichi Yamamoto
  • Patent number: 4141039
    Abstract: An addressable memory is supplied with pulse coded data at a first rate for writing such data into addressable locations in the memory; and stored data is read out from addressable locations at another rate different from the write-in rate. One advantageous application of such a memory is for changing the time-axis parameter, such as the repetition rate, of data so as to effect time compression and/or expansion. Control over the memory is achieved by generating write clock pulses and read clock pulses at different repetition rates. Data, such as a pulse data bit, is written into an addressable location in the memory during the interval between successive write clock pulses. A data pulse bit is read out of the memory during the interval between successive read clock pulses. The read operation is delayed in the event that it coincides with a write operation.
    Type: Grant
    Filed: February 8, 1977
    Date of Patent: February 20, 1979
    Assignee: Sony Corporation
    Inventor: Kaichi Yamamoto