Patents by Inventor Kambiz Vakilian

Kambiz Vakilian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11683046
    Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: June 20, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
  • Patent number: 11507119
    Abstract: In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: November 22, 2022
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Kambiz Vakilian, Jan Westra, Dmitrii Loukianov, Vikrant Dhamdhere, Jingguang Wang
  • Publication number: 20220368335
    Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.
    Type: Application
    Filed: August 1, 2022
    Publication date: November 17, 2022
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
  • Patent number: 11405044
    Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 2, 2022
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
  • Publication number: 20220150041
    Abstract: Disclosed herein are implementations of a hybrid network for use in a full duplex communication system. In one aspect, the hybrid network includes a first circuit coupled between an output of a communication channel and a shared output of a transmitter and the communication channel, a second circuit coupled between a first output of the transmitter and the shared output, a third circuit coupled between the shared output and an input of an amplifier, a fourth circuit coupled between the input of the amplifier and a second output of the transmitter, and a fifth circuit coupled between an output of the amplifier and the input of the amplifier. In some embodiments, the output of the amplifier is coupled to an input of a receiver.
    Type: Application
    Filed: January 19, 2021
    Publication date: May 12, 2022
    Inventors: Jingguang Wang, Kambiz Vakilian
  • Publication number: 20220149851
    Abstract: The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.
    Type: Application
    Filed: January 28, 2021
    Publication date: May 12, 2022
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jingguang Wang, Jing Wang, Robert Roze, Kambiz Vakilian
  • Patent number: 11054447
    Abstract: A system for controlling the impact of process and temperature in passive signal detector includes a voltage level detector, a first transistor with a drain electrically connected to a first input of the voltage level detector, and a second transistor with a drain electrically connected to a second input of the voltage level detector. The first transistor has a threshold voltage of a first voltage value. The threshold voltage corresponds to a minimum gate-to-source voltage to create a conducting path between source and drain terminals of a transistor. The second transistor has a threshold voltage of the first voltage value. An offset voltage is applied across a gate of the first transistor and a source of the second transistor, and applied across a gate of the second transistor and a source of the first transistor. A difference between a threshold voltage and the offset voltage is constant.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: July 6, 2021
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kambiz Vakilian, Jingguang Wang, Vikrant Dhamdhere
  • Patent number: 11038348
    Abstract: A system and method includes a power control circuit for controlling first power from a power supply provided to a first circuit includes a first stage and a second stage. The first stage includes a low power energy detector and a first power switch. The low power energy detector is configured to provide second power via the first switch in response to energy. The second stage includes a signal detector configured to detect a characteristic of a signal associated with the energy in response to the second power. The signal detector is configured have the first power provided to the first circuit in response to the characteristic being detected.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: June 15, 2021
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kambiz Vakilian, Jingguang Wang
  • Publication number: 20200049741
    Abstract: A system for controlling the impact of process and temperature in passive signal detector includes a voltage level detector, a first transistor with a drain electrically connected to a first input of the voltage level detector, and a second transistor with a drain electrically connected to a second input of the voltage level detector. The first transistor has a threshold voltage of a first voltage value. The threshold voltage corresponds to a minimum gate-to-source voltage to create a conducting path between source and drain terminals of a transistor. The second transistor has a threshold voltage of the first voltage value. An offset voltage is applied across a gate of the first transistor and a source of the second transistor, and applied across a gate of the second transistor and a source of the first transistor. A difference between a threshold voltage and the offset voltage is constant.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 13, 2020
    Inventors: Kambiz Vakilian, Jingguang Wang, Vikrant Dhamdhere
  • Publication number: 20200050224
    Abstract: In some aspects, the disclosure is directed to methods and systems for providing voltage regulation and transient suppression from a battery to an integrated circuit. A resistor between a source power supply and the integrated circuit may dissipate power and reduce the voltage at the integrated circuit's input, with current through the resistor under control of an internal regulator of the integrated circuit.
    Type: Application
    Filed: August 2, 2019
    Publication date: February 13, 2020
    Inventors: Kambiz Vakilian, Jan Westra, Dmitrii Loukianov, Vikrant Dhamdhere, Jingguang Wang
  • Publication number: 20190341774
    Abstract: A system and method includes a power control circuit for controlling first power from a power supply provided to a first circuit includes a first stage and a second stage. The first stage includes a low power energy detector and a first power switch. The low power energy detector is configured to provide second power via the first switch in response to energy. The second stage includes a signal detector configured to detect a characteristic of a signal associated with the energy in response to the second power. The signal detector is configured have the first power provided to the first circuit in response to the characteristic being detected.
    Type: Application
    Filed: July 19, 2019
    Publication date: November 7, 2019
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Kambiz Vakilian, Jingguang Wang
  • Patent number: 10361558
    Abstract: A system and method includes a power control circuit for controlling first power from a power supply provided to a first circuit includes a first stage and a second stage. The first stage includes a low power energy detector and a first power switch. The low power energy detector is configured to provide second power via the first switch in response to energy. The second stage includes a signal detector configured to detect a characteristic of a signal associated with the energy in response to the second power. The signal detector is configured have the first power provided to the first circuit in response to the characteristic being detected.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: July 23, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kambiz Vakilian, Jingguang Wang
  • Publication number: 20170229860
    Abstract: A system and method includes a power control circuit for controlling first power from a power supply provided to a first circuit includes a first stage and a second stage. The first stage includes a low power energy detector and a first power switch. The low power energy detector is configured to provide second power via the first switch in response to energy. The second stage includes a signal detector configured to detect a characteristic of a signal associated with the energy in response to the second power. The signal detector is configured have the first power provided to the first circuit in response to the characteristic being detected.
    Type: Application
    Filed: March 11, 2016
    Publication date: August 10, 2017
    Applicant: BROADCOM CORPORATION
    Inventors: Kambiz Vakilian, Jingguang Wang
  • Patent number: 7956687
    Abstract: The performance of an AGC loop typically depends on several factors, including gain linearity of the VGA and variation in the VGA bandwidth over the range of available gain settings. Although a resistively degenerated VGA provides for excellent gain linearity and immunity to process variations, the conventional architecture for a resistively degenerated VGA suffers from bandwidth variation over the range of available gain settings. Embodiments are provided herein of a constant-bandwidth VGA that utilizes resistive degeneration. To maintain a constant bandwidth over the range of available gain settings, degeneration resistors are coupled in parallel with compensation capacitors. In an embodiment, a compensation capacitor is determined to have a capacitance substantially equal to the decrease in total degeneration resistance that occurs as a result of an associated degeneration resistor being placed in parallel with the total degeneration resistance.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: June 7, 2011
    Assignee: Broadcom Corporation
    Inventor: Kambiz Vakilian
  • Publication number: 20100315164
    Abstract: The performance of an AGC loop typically depends on several factors, including gain linearity of the VGA and variation in the VGA bandwidth over the range of available gain settings. Although a resistively degenerated VGA provides for excellent gain linearity and immunity to process variations, the conventional architecture for a resistively degenerated VGA suffers from bandwidth variation over the range of available gain settings. Embodiments are provided herein of a constant-bandwidth VGA that utilizes resistive degeneration. To maintain a constant bandwidth over the range of available gain settings, degeneration resistors are coupled in parallel with compensation capacitors. In an embodiment, a compensation capacitor is determined to have a capacitance substantially equal to the decrease in total degeneration resistance that occurs as a result of an associated degeneration resistor being placed in parallel with the total degeneration resistance.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 16, 2010
    Applicant: Broadcom Corporation
    Inventor: Kambiz VAKILIAN
  • Patent number: 7386085
    Abstract: A closed-loop circuitry includes, in part, a loop filter and a current source/sink coupled to the loop filter to adjust the phase/frequency of the signal generated by the closed-loop circuitry. Because the voltage generated by the loop filter has a relatively low frequency, the current source/sink is operable at a relatively low frequency. Each current source and current sink may be a current digital-to-analog (DAC). The amount of current sourced into or sunk out of the loop filter by the current DAC is varied by setting the associated bits of a multi-bit signal. If the closed-loop circuitry is differential, a current source is coupled to the loop filter adapted to receive the differentially high signal, and a current source is coupled to the loop filter adapted to receive the differentially low signal.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: June 10, 2008
    Assignee: Broadcom Corporation
    Inventors: Afshin Momtaz, Kambiz Vakilian
  • Publication number: 20030223525
    Abstract: A closed-loop circuitry includes, in part, a loop filter and a current source/sink coupled to the loop filter to adjust the phase/frequency of the signal generated by the closed-loop circuitry. Because the voltage generated by the loop filter has a relatively low frequency, the current source/sink is operable at a relatively low frequency. Each current source and current sink may be a current digital-to-analog (DAC). The amount of current sourced into or sunk out of the loop filter by the current DAC is varied by setting the associated bits of a multi-bit signal. If the closed-loop circuitry is differential, a current source is coupled to the loop filter adapted to receive the differentially high signal, and a current source is coupled to the loop filter adapted to receive the differentially low signal.
    Type: Application
    Filed: May 30, 2002
    Publication date: December 4, 2003
    Applicant: Broadcom Corporation
    Inventors: Afshin Momtaz, Kambiz Vakilian