Abstract: In an automated test equipment system for testing a circuit board containing a plurality of interconnected digital devices, an in-circuit test is created for a device under test based on stimuli used to test devices which drive the device under test. The method includes the steps of determining, from the electrical interconnect data for the devices on the circuit board, which devices have an output driving an input of the device under test; testing each of the driving devices; observing the response of the device under test during testing of the driving devices; and using the test stimuli for the driving devices and the observed response of the device under test as an in-circuit test for the device under test.

Abstract: Disclosed is a test system having an arbitrary waveform generator, a comparator, and a test controller to analyze the arbitrary signal output from a device under test. The output of the device under test is connected to one input of the comparator and the output of the arbitrary waveform generator is connected to the other input of the comparator. The test controller stimulates the device under test, causing it to perform a function, and stimulates the arbitrary waveform generator, causing it to generate a limit envelope signal. The output of the comparator is continuously monitored by the test controller to determine whether the signal output of the device under test exceeds the limit envelope created by the arbitrary waveform generator.

Abstract: The present invention provides a circuit board tester for performing functional and in-circuit tests on one or more circuit boards. The circuit board tester includes a testhead for interfacing with one or more circuit boards and supplying the resources for the testing thereof. The testhead includes a plurality of modules with each module having a defined amount of resources and a processor for use in executing a test plan to test the circuit board. The circuit board tester further includes a high-speed link for coordinating the execution of a test plan by two or more modules when the resources of one module are insufficient to test a particular circuit board. Each module in the testhead can be selectively connected or disconnected from the high-speed link. Consequently, two or more modules can be connected to the high-speed link to test a first circuit board while another module, that is disconnected from the high-speed link, can concurrently test a second circuit board.

Abstract: An improved digital testing device is presented which includes the capability to detect and avoid a pair of common sources of measurement error. One source of error occurs when measurements are made within a Setup time before a transition in the signal under test or during a Hold time after such a transition. This device includes the ability to detect when this occurs and to insert a relative delay between the measurements and transitions to eliminate such errors. The device also detects the existence of a 3-state condition of a point of the circuit under test during the period of a measurement and provides an output indication when such occurs.