Abstract: A PDC communication controlling apparatus includes an audio processing section for converting a digital audio signal which has been encoded at a transmission rate of a personal digital cellular (PDC) into a digital audio signal at a transmission rate of a digital exchange network, a small radio base station controlling section accommodating a plurality of small radio base stations which are connected to PDC portable terminal units through radio circuits and which have different radio cover areas, the small radio base station controlling section managing the radio cover areas of the PDC portable terminal units, controlling calls, and controlling and managing the radio circuits, a network-side adaptor used in non-audio communications with the PDC portable terminal units, a PDC/network interface section connected to a private branch exchange through a plurality of communication paths, a time division switch for connecting the PDC/network interface, the audio processing section, the radio base station controlling

Abstract: A system for monitoring a CDMA-type mobile terminal device, includes (a) a CDMA base station system, (b) a CDMA core network connected to the CDMA base station system through wires, (c) a server which monitors the CDMA base station system connected to the CDMA core network through wires, (d) a monitoring device connected to the server through wires, the monitoring device monitoring and controlling the CDMA base station system through both the server and the CDMA core network, and (e) a CDMA-type mobile terminal device connected to the CDMA base station system through radio signals.

Abstract: A voltage-controlled oscillator generates an oscillation signal having a frequency corresponding to a control signal. A phase comparator detects a phase difference between a reference signal and a frequency-divided signal derived from the oscillation signal and generates a phase difference signal. A control circuit, which comprises an A/D converter, a high-speed processor, and a D/A converter, generates a control voltage so as to reduce a time-dependent change in the phase difference signal to synchronize the oscillation signal with the reference signal. When the synchronization of the oscillation signal with the reference signal is completed, the control circuit secures a control voltage at the time time-dependent change in the phase difference signal becomes equal to or smaller than a phase difference stored in a flash ROM.

Abstract: An error allowing pattern matching circuit comprises a data conversion circuit which converts receive data transmitted serially thereto from an input terminal into parallel data and outputs the parallel data, a ROM to which the parallel data from the data conversion circuit are inputted as an address signal and which outputs the numbers of error bits for four different particular patterns to be detected in response to the address signal, four setting circuits for setting the allowable numbers of error bits for the receive data, and four comparison circuits which individually compare the four sets of error bit numbers outputted from the ROM with the allowable numbers of error bits set by the four setting circuits, each generating the receive data when the error bit number becomes lower than the corresponding allowable number of error bits as a detection pulse.